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We are using KIT_XMC4400_DC_V1 board, and using PMSM_FOC App from DAvE IED. We can read the I_V, user_speed_set. etc. However, the Inverter Enable could not be activated. ( Active_Low). We traced teh PMSM_FOC error code. It always show "2", Meaning " Trap". How to debug for such case? How can we know where give this "TRAP" ?
Solved! Go to Solution.
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Hi @BlueSky ,
The EVAL-M5-IMZ120R-SIC evaluation board is equipped with an overcurrent and overtemperature protection. If an overcurrent or overtemperature event is detected, the /FAULT signal is pulled low and the MOSFET drivers are simultaneously disabled for around 30 ms.
Ques : Reading the PMSM_FOC Manual, in the state machine, there are a lot factors to set "FAULT", how can we identify which fault indeed if PMSM_FOC_EID_TRAP_ERROR is activated ?
PMSM_FOC_EID_TRAP_ERROR is a hardware error initiated by gate driver due to overload or overtemperature condition.
The four different operational error code
PMSM_FOC_EID_INIT_FAILED, /**< Initialization failed*/
PMSM_FOC_EID_TRAP_ERROR, /**< Trap condition is detected */
PMSM_FOC_EID_UNDER_VOLT, /**< Under voltage is detected */
PMSM_FOC_EID_OVER_VOLT /**< Over voltage is detected */
Please ensure CCU8 TRAP is set to active low in control algorithm of PMSM_FOC_APP
Please share us the power board configuration and motor datasheet that will help us to understand the issue better.
The evaluation board ( EVAL-M5-IMZ120R-SIC )characteristics are:
Input Voltage: 340 – 480 Vrms
DC bus voltage : 530 V – 670 V
Thanks,
Krupashankar
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Hi @BlueSky ,
Please check you gate driver fault pin status as the pin is connected to input of CTRAP which sets CTRAP pin active which makes PWM output passive. This leads to error code 2 - PMSM_FOC_EID_TRAP_ERROR.
Please refer to Application note section 2.9 -> https://www.infineon.com/dgdl/Infineon-PMSM%20FOC%20motor%20control%20software%20using%20XMC-Applica...
Please let us know if this helps.
Could you please share the load characteristics and motor parameters which will help us in understanding the problem better.
Thanks,
Krupashankar
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Thanks Krupashankar,
Please find more information for this application:
Processor card: KIT_XMC4400_DC_V1
Drive board: EVAL-M5-IMZ120R-SIC board.
The CTRIP pin is set to low because the ENABLE pin is high, as there is Q10 transistor linked them.
However, we set ENABLE to low (Active Low), CTRIP pin will go high for very short duration. and back to low (fault).
Reading the PMSM_FOC Manual, in the state machine, there are a lot factors to set "FAULT", how can we identify which fault indeed if PMSM_FOC_EID_TRAP_ERROR is activated.
Please find the state machine below..
.
PS. Motor parameters (Maybe wrong,) :
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Hi @BlueSky ,
The EVAL-M5-IMZ120R-SIC evaluation board is equipped with an overcurrent and overtemperature protection. If an overcurrent or overtemperature event is detected, the /FAULT signal is pulled low and the MOSFET drivers are simultaneously disabled for around 30 ms.
Ques : Reading the PMSM_FOC Manual, in the state machine, there are a lot factors to set "FAULT", how can we identify which fault indeed if PMSM_FOC_EID_TRAP_ERROR is activated ?
PMSM_FOC_EID_TRAP_ERROR is a hardware error initiated by gate driver due to overload or overtemperature condition.
The four different operational error code
PMSM_FOC_EID_INIT_FAILED, /**< Initialization failed*/
PMSM_FOC_EID_TRAP_ERROR, /**< Trap condition is detected */
PMSM_FOC_EID_UNDER_VOLT, /**< Under voltage is detected */
PMSM_FOC_EID_OVER_VOLT /**< Over voltage is detected */
Please ensure CCU8 TRAP is set to active low in control algorithm of PMSM_FOC_APP
Please share us the power board configuration and motor datasheet that will help us to understand the issue better.
The evaluation board ( EVAL-M5-IMZ120R-SIC )characteristics are:
Input Voltage: 340 – 480 Vrms
DC bus voltage : 530 V – 670 V
Thanks,
Krupashankar
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Hi @BlueSky ,
We could see the current shunt resistor you have entered is 10mOhm in your Power Board -> Current amplifier configuration, please change the shunt resistor to 1mOhm.
Please change the output bias voltage to 2.5V in Power Board -> Current amplifier configuration
Please make configurations as per EVAL-M5-IMZ120R-SIC board in DAVE IDE. Please let us know if it solves the issue.
Thanks,
Krupashankar
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Scope is probing XMC4400 board, connector TP301 .
C1- /Enable TP301A.15 (Yellow)
C2 - /CTRIP0 TP301A.13 (Green)
We removed R16 from inverter board, it is an inter-lock circuit.
Please find the waveform. Seems like..
Power on --> Enable Pin go down. ---> enable the inverter. ---> However, CTRAP is still low
---> MCU pull Enable up , because fault is detected.
Question: How to delay MCU to pull /Enable low ( meaning delay to enable invertor during power up) ?
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Hi @BlueSky ,
Could you please try increasing the PMSM_FOC_DELAY_COUNT in pmsm_foc.h file this delays the FOC initialization and provides more time for driver IC to stabilize.
#define PMSM_FOC_DELAY_COUNT (0x7FFFF) /** Delay for power board stabilization after power on reset */
Thanks,
Krupashankar
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Hi @BlueSky ,
We were able to configure the DAC in same method as in example PMSM_FOC_EXAMPLE_XMC44 Version :4.2.6
uint8_t DAC_CHANNEL_0 = 0;
/* Enable DAC module and configure the channel */
XMC_DAC_CH_Init((XMC_DAC_t *)(void *)DAC,DAC_CHANNEL_0,&DAC_0_Channel_Config);
/* start single value mode for configured channel */
XMC_DAC_CH_StartSingleValueMode((XMC_DAC_t *)(void *)DAC,DAC_CHANNEL_0);
status = DAVE_Init(); /* Initialization of DAVE APPs */
/*Initialize DAC data register for generating amplifier bias voltage of 2.5V*/
XMC_DAC_CH_Write((XMC_DAC_t *)(void *)DAC,DAC_CHANNEL_0,4095);
We found that DAC maximum voltage is 2.5V, for bias of 2.5V from DAC count of 4095 have to be used.
For further details on DAC initialization please refer to XMC 4400 reference manual:https://www.infineon.com/dgdl/Infineon-xmc4400_rm_v1.6_2016-UM-v01_06-EN.pdf?fileId=db3a30433afc7e3e...
Thanks,
Krupashankar
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Thanks Krup,
DAC problem had been solved. thanks .
we would like to know the relationship between the /CTRIP and /Enable in the FOC software.
/Enable TP301A.15 on XMC4400 board
/CTRIP0 TP301A.13 on XMC 4400 board
/CTRIP0 is monitored by ISR. and /Enable is controlled by state machine. Can we describe the /CTRIP0 detection sequence as following.
Power ON. ----> Software will check /CTRIP0
Branch 1, if /CTRIP0 = GND, Set /ENABLE to high.
Branch 2, if / CTRIP0 = High, Set /Enable to Low, ( enable the invertor).
Question:
1. XMC4400 provide a filter for CTRIP0 detection? and what is the sampling rate if level detection? What is the filter value?
2. Will XMC4400 enable the invertor before detecting the /CTRIP0?
Finally, where can we find the documentation for this question? or we have to read the code? If we have to read the code, may advice which function?
Regards
the PMSM_FOC_EID_TRAP_ERROR
/* Trap interrupt */
__attribute__ ((section (".ram_code")))void PMSM_FOC_0_Trap_OneMatch_ISR()
{
/* Check if trap is detected */
if(XMC_CCU8_SLICE_GetEvent(PMSM_FOC_0.pwm_svm_ptr->phase_ptr[0]->slice_ptr,XMC_CCU8_SLICE_IRQ_ID_EVENT2) == true)
{
PMSM_FOC_0.operational_error |= ((uint32_t)1 << (uint32_t) PMSM_FOC_EID_TRAP_ERROR);
PMSM_FOC_0.msm_state = PMSM_FOC_MSM_ERROR;
PMSM_FOC_MotorStop(&PMSM_FOC_0);
}