CYW4343W Queries:

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BiMa_2659891
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Hi,

We are using the CYW4343W for our Wi-Fi + BT/BLE interface, where we have below queries to be resolved to move further in design:

1) Is the external 32k LPO clock must required, for power up-sequence?

2) Due to space constrain in our PCB we are planning to remove external 32k crystal, Would it be degrading any functionality of chipset?

3) As per datasheet which mentions that when not using LPO clock “BLE will be always on and cannot go to deep

sleep”. Can we use Internal 33k clock for Sleep modes?

4) What does Deep sleep mode state indicate? Will it retain the BLE connection to Master/Slave in Deep sleep mode?

5) While returning from Deep sleep mode to normal run mode, Does it requires to completely reload the driver/software?

6) What is the leakage current of SoC when Both BLE and WLAN Reg are kept OFF?

7) In our application we will require to use I2S interface for BT audio transfer. At the time of BT I2S communication, Will CYW4343W will require communicating over UART interface?

Looking for quick support on this, As we have very critical timeline on this.

--

Thanks,

Bimal Makwana

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1 Solution
RaktimR_11
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500 replies posted 250 replies posted 100 replies posted

Hello Bimal,

1,2. The external LPO of 32k is very much required for the power-up sequence. You can not remove that connection for space constraints (check figure number 20.1.2 in the datasheet).

3. Internal sleep modes use the 32k clock as reference clock like in doze mode, the radio, analog domains, and most of the linear regulators are powered down. The rest of the CYW4343W remains powered up in an IDLE state. All main clocks (PLL, crystal oscillator) are shut down to reduce active power to the minimum. The 32.768 kHz LPO clock is available only for the PMU sequencer.

4,5. Please go through the page number 11 of the datasheet to understand more about deep sleep. If you are still having questions regarding the same, please get back to us. It will not retain the BLE connection during the entire sleep period. But after a certain interval, it will wake up and check the status of the connection with Master/Slave and goes back to deep sleep again.

6. If you check out the section 18 of the datasheet, you could find the leakage current specifications there along with all the other relevant power consumption specifications.

7. At the time of BT I2S communication, CYW4343W does not require communicating over UART interface.

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11 Replies
BiMa_2659891
Level 1
Level 1
5 replies posted 5 questions asked First like received

Hi Team,

Any Update on this thread?

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Adding the level 1 applications team.

grsr lsri rash mady gsns ankh

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RaktimR_11
Moderator
Moderator
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500 replies posted 250 replies posted 100 replies posted

Hello Bimal,

1,2. The external LPO of 32k is very much required for the power-up sequence. You can not remove that connection for space constraints (check figure number 20.1.2 in the datasheet).

3. Internal sleep modes use the 32k clock as reference clock like in doze mode, the radio, analog domains, and most of the linear regulators are powered down. The rest of the CYW4343W remains powered up in an IDLE state. All main clocks (PLL, crystal oscillator) are shut down to reduce active power to the minimum. The 32.768 kHz LPO clock is available only for the PMU sequencer.

4,5. Please go through the page number 11 of the datasheet to understand more about deep sleep. If you are still having questions regarding the same, please get back to us. It will not retain the BLE connection during the entire sleep period. But after a certain interval, it will wake up and check the status of the connection with Master/Slave and goes back to deep sleep again.

6. If you check out the section 18 of the datasheet, you could find the leakage current specifications there along with all the other relevant power consumption specifications.

7. At the time of BT I2S communication, CYW4343W does not require communicating over UART interface.

HI Roy,

Thanks for your above valuable inputs,

Can you please confirm that, Is HFP profile supported on CYW4343W? and Also it would be great if you can share HFP profile software with us.

Looking for your positive support on this.

HFP profile is supported on CYW4343W. I believe by software you mean to say the applications that you can test with the HFP profile. Some example applications are demo.watch, demo.hci_handsfree.

Hi Roy,

Thanks for your quick response on this,

Will let you know if any further details are required.

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Raktim Roy wrote:

HFP profile is supported on CYW4343W. I believe by software you mean to say the applications that you can test with the HFP profile. Some example applications are demo.watch, demo.hci_handsfree.

I'm confused now.

The demo.watch, demo.hci_handsfree example applications are in 20706-A2_Bluetooth rather than the 43xxx_Wi-Fi.

So how to test it by CYW4343W?

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Did not mean to confuse anyone. I tried to highlight the fact that the customer can use these examples to test the HFP profile, when ported to 4343W platform.

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I don't get it.

What do you mean by "ported to 4343W platform"?

The BT library used by 4343W is closed source library.

What is the relationship between 20706-A2_Bluetooth/* and 4343W?

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Hi,

CYW4343w does support HFP. The demo application demo.dual_hf_a2dp, which demonstrates how to stream A2DP audio and make/receive Handsfree calls from 2 smartphones makes use of HFP services. You could make use of this as a reference point to develop your application. Furthermore, the necessay APIs that you might be looking for to implement HFP service between devices can be found in  the driver folder:

/43xxx_Wi-Fi/libraries/drivers/bluetooth/include/wiced_bt_hfp_hf.h.

Regards

vnak wrote:

Hi,

CYW4343w does support HFP. The demo application demo.dual_hf_a2dp, which demonstrates how to stream A2DP audio and make/receive Handsfree calls from 2 smartphones makes use of HFP services. You could make use of this as a reference

4343W does not include in the VALID_PLATFORMS of dual_hf_a2dp.mk.

Even if you comment out the VALID_PLATFORMS setting, the build still fails.

e.g:

./make  demo.dual_hf_a2dp-FreeRTOS-LwIP-BCM94343WWCD1

MAKEFILE MAKECMDGOALS=demo.dual_hf_a2dp-FreeRTOS-LwIP-BCM94343WWCD1 OTA2_SUPPORT is disabled

Applying changes made to: apps/demo/dual_hf_a2dp/dual_hf_a2dp.mk

"Embedded Stack"

././libraries/drivers/bluetooth/wiced_hci_bt/wiced_hci_bt_src.mk

../wiced_hci_bt/

./tools/makefiles/wiced_config.mk:422: *** dual_hf_a2dp application does not support BCM94343WWCD1 platform.  Stop.

make: *** No rule to make target `build/demo.dual_hf_a2dp-FreeRTOS-LwIP-BCM94343WWCD1/config.mk', needed by `main_app'.  Stop.

The verbose output shows:

make[1]: *** No rule to make target `libraries/drivers/bluetooth/firmware/43438A1/26MHz/bt_firmware_embedded_headset.c', needed by `build/demo.dual_hf_a2dp-FreeRTOS-LwIP-BCM94343WWCD1/Modules/./libraries/drivers/bluetooth/firmware/43438A1/26MHz/bt_firmware_embedded_headset.o'.  Stop.

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