USB superspeed peripherals Forum Discussions
During I2C EEPROM writing in control center, fail message displayed.
I tried both Atmel and Microchip.
It seems to be not written data to 2nd page of EEPROM.
Has anybody tried this?
Show LessDear all,
We've observed the speed about 210MB/s in streamer application with P67 chipset and NEC controller.
this speed is too slow compare to superspeed 5Gbps and expected performance of FX3 even.
I wonder what is a bottleneck at this low speed among whole system components(south bridge, PCIe, NEC controller, FX3's memory architecture, DMA speed, host driver, f/w driver,...)
and is there any possibility of speed-up in official release version of driver and firmware?
In my application, the speed is very important factor, so I'd like to hear ways of speedup technique and the limit of FX3 if exists.
Regards,
HC
Show LessHi,
In DVK schematics, pin 15 (N_SRST) is not connected to any pins of FX3.0. However, in the J-Link datasheet, this pin (RESET) is defined to be connected to target CPU reset signal. Is it ok to leave this pin unconnected?
Thanks,
Nazila
Show LessIs there a document available or in the works describing the FX3's peripheral register set (GPIO, UART, I2C, etc.)? I've read the datasheet, app notes, SDK documentation, and a number of firmware examples and they all assume the firmware stack API is used to interact with the peripherals. Are there any examples available that illustrate direct access to the peripherals?
Thanks,
Dave
Show LessHello,
While I was debugging my logic that interfaces to the FX3, I noticed something I would like to confirm. We are using Synchronous Slave FIFO Write Mode of the FX3 GPIF-II.
According to the FX3 spec (CYUSB3014.pdf page-21), there are two different ways of issuing PKTEND, one with last data and one without data (ZLP). Unlike FX2, FIFOADDR must be presented a cycle earlier to write data.
In the first case (PKTEND w/ data) PKTEND seems assocating with the address the write data is associating with, which is the address in the previous cycle. However, in the latter case (PKTEND w/o data) the PKTEND is associating with the address in the same cycle.
As my design pipelines the address and the data, the address in the last data cycle *may* not stay the same from the previous cycle.
I would like to know whether the PKTEND in the first case (PKTEND w/ data) is associating with the address in the previous cycle or the address in the cycle that is coincident to the write data.
If the PKTEND is associating with the address in the same cycle, Cypress should mention such restriction in the FX3 documentation. Otherwise, it would create a hard-to-debug mysterious problem.
Thank you for your attention.
Aki-
I still encounter instable USB 3.0 connection when using the slave fifo interface http://www.cypress.com/?app=forum&id=167&rID=55620 with auto DMA transfer on the FX3.
Now I found that if I am using the BulkAutoLoop (C++) Example from Cypress together with 2 kByte Packet size per transfer, no data is received the CyUSB driver crashes. At some point no data is received and then the driver crashes. When I send more than 2 kByte per transfer there is no problem. The DMA buffer on the FX3 is set up to 1x1 kByte.
I suspect that there is a problem with the auto DMA transfer on the FX3 since the behavior changes if I use larger DMA buffer size than 1x1kByte. Also I do not see this problems when using manual DMA transfer mode. With larger DMA buffer size, 2 kByte data packets also fail and I need to send 4 or more kByte. At the same time there has to be an issue in the CyUSB driver since it always crashes when no data is received in the BulkAutoLoop example. Sometimes I even need to restart my computer, sometimes it is good enough to reload the FW on the FX3 Eval Board.
I am using the following HW setup:
FX3 Eval Board Revision “May 2011”, Beta3 SDK
OS: Windows 7, 64 bit
USB Host Controller: ASMedia USB 3.0 controller (Asus P8Z68-V Motherboard)
Thanks for help.
Regards
Silvio
Show Less
Hi,
In Streamer application, FinishDataXfer failure merely counts up failure variable.
What's exact meaning of it?
and, I wonder how retry mechanism be implemented in FX3.
Regards,
HC
Show LessFrom the release notes: "When the warm reset functionality of the CyU3PDeviceReset() API is used, any global variables used by the application will not be properly re-initialized. This is because the startup code that initializes these variables would have been lost and cannot be executed again without loading the application again. If warm reset is needed, the application code must ensure that all necessary data is saved and restored or re-initialized as required."
However, in my tests I have found that static global variables are indeed reset, or perhaps just zeroed out.
Could you please clarify on what global variables are not reset during a warm reset?
Thanks.
Show LessHey,
I have two furthermore questions.
1. Where is an description of what is the different between U-Port, S-Port and P-Port sockets?
2. How can I explicitly map an endpoint to an socket? In all examples, there is no specific assignment.
Marco
Show LessHi,
Can I have a Synchronous data transfer between FX3.0 and another device (for instance an FPGA) other than GPIF? In other words can I use GPIOs to transfer data to/from FX3.0 in a Synch manner?
Thanks,
Nazila
Show Less