USB superspeed peripherals Forum Discussions

Is it possible to set/reset GPIO in the application code or does it have to be done using the GPIF?

Thanks

Hi,

I am wondering why the difference between the clock speed and the byte replay is that huge when I use libsdk or libbootloader.

I have some screenshots and initializing code append in the pdf document.

thanks,

lumpi

Dear Sir/Madam,

In the USBHost Application Example, at the beginning of cyfxusbhost.c , it is mentioned that "Care should be taken so that, a USB host is not connected to FX3 while while host stack is active. This will mean that both sides driving the VBUS causing a hardware damage."

Can we program the USBHost Application example .img file into the RAM of FX3 using the tool "Control Center" with the help of the USB3.0 cable provided. While we are doing so, after the programming is completed, the USBHost software is running in the FX3, while the a USB Host is connected to the FX3 through USB3.0 cable. Would the hardware be damaged under such a condition.

Expecting Your valuable reply, as soon as possible, before the start of testing.


regards,
Sajeevan.K

I have a design with an FX3 as a slave and an FPGA as a master. I would like it if someone can just confirm my understanding of the flags.

If I have an producer socket (data coming into the FPGA) then if the flag is configured as DMA ready, it will be set low when a buffer (say 512 bytes if that is what the buffer is configured) becomes full (512 bytes in the buffer). So the flag would indicate that the buffer is not empty. The flag would go high when the 512 bytes had been read from the buffer.

If I have an consumer socket (data coming from the FPGA) then if the flag is configured as DMA ready, it will be low whilst there is space in the buffer (again if the buffer is 512 bytes). The flag would go high once 512 bytes had been written.

Is this correct?

Thanks

Jon

Hi,

I'm using the VIA PCIE USB3.0 card and USB3014 DVK to study USB3014.  I installed V1803 driver for the card and the DVK works fine. However, when I upgraded the driver to V3105, the DVK can't work with any firmware. When I downloaded any firmware example by the control center, the DVK can be recognized by the Windows 7 (32-bit), however, it can be started correctly. The device name was displayed correctly with an exclamation signal in windows device manager.

I wonder what is the problem.

Thanks!

Rover

1.when the os is invoked , what will the os do?

2.when I want to transfer date to peripheral by FIFO ,if the os will take part in ? which example introduce this function?

I have taken the slave fifo async example, and replaced the state machine with a much simpler state machine. The current GPIF state machine calls DR_DATA (reads from Thread3) in one state then calls DR_GPIO in another, there are no conditions, everything's LOGIC_ONE. By looking at a logic analyzer I see the appropriate GPIO pin is being toggled by DR_GPIO which makes me believe that the state machine is running. When I use the USB Control Center application on windows, I can send 2 large 1024 byte packets (whose DMA callbacks are received) after which the application is unable to send any more data and fails with the message "BULK OUT transfer failed with Error Code: 997". After this however the every BULK OUT fails, and the DMA callback on the FX3 is no longer called.

What causes this error to occur? Does the FX3 think the GPIF is not removing content from the DMA buffers fast enough (or at all)?

If so, how should I correct this in my simple state machine? I've tried switching DR_DATA between Thread0 and Thread3 to make sure I didn't mix up the threads.

I am successfully using the sample slave fifo interface with an FPGA and want to reduce the number of pins. Is it possible to control OE (output enable) based on the 2bit address rather than on a dedicated pin?

Due to the mistake on the Sensor module layout, i will have to reconfigure data bus from GPIO[6], bus it seems the tool won't allow me to do so? it there any other solution?

Thanks

Owen