USB superspeed peripherals Forum Discussions

Some reference Using FX3, what is required to use DMA fabric to link Parallel Port sockets to a CPU using MANUAL_IN and MANUAL_OUT oper…  and FX3 CPU to Parallel Port Socket DMA Operation-Manual Out/In

How to connect CPU to PPort in the Master/Slave example?

In the attachment in the above references, there is a GPIF designer project too, but GPIF setting has nothing to do with who will be connected to P Port, right? So can I just use existing GPIF designer projects for Master/Slave example and only modify the DMA initialization code in the Master/Slave firmware to swith one end of some DMA channel from U port to CPU port and keep another end as before?

There is mouse HID example in the SDK. Is there some reference about keyboard HID? External source is fine too.

Hi,

We are developping a board CYUSB3014(fx3) based connected to high data rate sensor. data Rate is typically beyond 1Gbps and is dedicated to medical applications.

Furthermore, for security reasons, the board is also connected (through I2C) to a data logger that delivers small (typically 16 to 32 bytes) packets to be included in high data rate flux at every packet. The change from the data logger is asynchronous from the high data rate flux but we have to send those data in flux.

For example :

High Data Packet 1 (~32 KB) < 32 bytes status #1 logger> High Data Packet 2 (~32 KB) < 32 bytes status #1 logger>  ...

High Data Packet 40 (~32 KB) < 32 bytes status #1 logger>High Data Packet 41 (~32 KB) < 32 bytes status #2 logger (new set)> ... etc.

with "manual_byte" operations mode, we retrieve the 32 KB packets from high data rate and add the logger's data before recommit. this is working, but the rythm is not that fast, less than expected.

we would like to daisy chain dma operations to use an auto_mode dma process where the "32 bytes signature" data would be located in memory and be automatically added to flux as above.

Would it be possible to proceed like in CyU3PDmaDscrChainCreate function but to create such a "flux" / "memory" / "flux" dma operation chain ?

Thank you for your help,
Best Regards,

Q1) We have tied MIPI_RESET to GND through a pull-down resistor and don’t have a way to drive this pin high (by design). We only control the input to the RESET# pin. So presumably we can ignore the requirement for MIPI_RESET# that is depicted in the timing diagram of the datasheet (Figure 4 on page 10 of document number 001-87516 Rev. *N)?

Q2) The attached PowerPoint slides depict the voltages in the timing diagram at power-up and power-down. I believe we comply with all the requirements in the timing diagram, but I am concerned about the fact that VUSB is not a monotonically rising signal. Although VUSB starts to rise before all other voltages and quickly reaches 4V, it then drops down to around 2.5V. Eventually VUSB rises again to its steady state value of ~5V but this doesn’t happen until after the other voltages have reached steady state. Is this a cause for concern?

Thanks,

James

Hello,

I'm developing a host side interface to get the data transferred from the USB endpoint. Regarding the open source API provided by Cypress, I want to import the Streamer application to the Visual Studio 2019 Community edition and work on it. The problem, I faced is the references can not be detected, as it is shown in following image:

DO you have any Idea how it can be resolved?

Thank you in advance.

Kind Regards

HI, there,

Good day.

I am developing on Superspeed Explorer Kit(CYUSB3014 inside), and CYUSB3A-007(Xilinx CPLD inside). I want to use CPLD as MasterFifo while the FX3 as slavefifo.

But there are problems when using  the examples(superspeed design example v1.2.1 download from Cypress) .

1. I found there is no clock input for CPLD board, so I guess the FX3 must use its internal clock, but “SlaveFIFO_Example“ of the firmware project can not output this clock, how would it work without clock?
2. Open the CPLD project of CPLDASMASTER , there are several questiosn I do not understand. for one thing is the pins's locations are not correct when compare with explorer kit, such like the PushButton do not have real button, the "RD" and "WR" pins of USB3014 are not  correspond to real ones, and they are only three flags in the firmware while four in CPLD project, for the other thing is there is no "CS" and "OE” pins for USB3014 in CPLD project, will it work then?

For all of problems above, I guess I must miss some important steps when using these two boards and this example.

Please give some suggestions. What I earge to know is whether you have mature example that the users can develop directly on the two boards.

thanks

Jiayou

I've been asked to resurrect a project that someone else did from 3 years ago that used  EZ-USB FX3 SDK 1.3.3, that work was done on a Mac and I'm looking for the installer for v1.3.3 for Windows (the Mac installer is lost to history so I have no installers for v1.3.3).  Anyone know where I can get it?  I couldn't find it on the Cypress website, the "archive" area doesn't include installers, only firmware.

I'm looking for v1.3.3 because when I use the current version (v1.3.4) when booting from USB the driver doesn't enumerate (I have checked the PMODE signals and they are Z11 so it should boot from USB, in fact it must be because I can tell that it is not booting the existing FW in the I2C EEPROM).  Because I get nothing enumerated I'm stuck and can't program FW into the I2C EEPROM on the board.  I don't know for certain that v1.3.3 will enumerate but I've seen a lot of discussions online talking about different versions and enumeration problems.  Does anyone know from experience that the exact version matters?

Thanks for any/all assistance!

Greg

I am designing a USB3 dongle with FX3 chip.

I saw examples in the schematic of design examples, but it is only USB Type B female.

Is there an connection example for Type A plug?

This is how I have it connected right now. I have the TX pair of FX3 connected to the RX pair of USB Type A plug

and RX pair of FX3 connected to TX pair of USB Type A plug. Is this correct?

Thank you so much!

Two Eclipse FX3 projects need some common external header file. The file have been included in to the project by creating a Linked Folder in Eclipse, the header file appear in the project tree, but during build the header can't be found.

I include such line into makefile in the project:

Include += -I"absolute path to the external folder that contains the header"

after

include $(FX3FWROOT)/common/fx3_build_config.mak

But it doesn't work. And even the line

include $(FX3FWROOT)/common/fx3_build_config.mak

is removed, during build the arm-none-eabi-gcc command line still use the same -I as before - the updated makefile doesn't have effect at all.

There are four CyU3PUsbEpEvtControl calls in DMA manual example "C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\dma_examples\cyfxbulklpmanual"

But there is no such call in cyfxbulklpman_removal example.

What is the purpose of CyU3PUsbEpEvtControl in cyfxbulklpmanual, when is such calls required?