Hi, I am interfacing a qvga sensor to my FX3 board. configured it according to AN75779 reference doc. I traced the data on wireshark and as per the calculation, it shows me the buffer data more than the 1 frame size. What could be the reason?
where I should look into it?
I am using the Streamer Application from SDK1.3.4 with the SuperSpeed Explorer Kit. When I plug the setup into a USB3 port that is part of the motherboard, all is fine and I can get transfers approximately 4.3Gbps. There are no failures. I am just using the default settings that the Streamer Application starts with. All looks good and is okay.
However, when I try to use a RocketU 1244A USB3 add-in card with the default settings, I get approximately 200 Successes and then it just keeps failing. The transfer rate just decreases to 0 if I let it run over time. After the initial successes, everything is failure.
The settings are BULK IN, packets per xfer=32, xfers to queue=16. Which is the default.
After trying numerous different things, it appears that the 1244A card cannot queue up any more than one DeviceIoControl() buffer at a time? Other cards, in addition to the motherboard usb ports, appear to allow queuing up multiple buffers simultaneously via DeviceIoControl().
If I make the packets per xfer=1 and xfers to queue=1 in the Streamer Application with the 1244A card, I can get no failures but the transfer rate is 0.043Gbps (much slower). Are you aware of any limitations in using DeviceIoControl() with the 1244A USB3 PCIe card?
Hello, we would like to interface an FX3 controller via C library calls (or via Python ctypes). Do you provide a DLL for CyApi? I could only find the static CyApi.lib or the dynamic CyUSB.dll (which is a .NET DLL and does not export functions). Thanks!Show Less
I want to configure the GPIF II interface of CYUSB3014 in 32-bit parallel bus + Slave FIFO mode (bidirectional).
This clock frequency is stated in the data sheet as a maximum of 100MHz, but is it variable if it is 100MHz or less?
I want to change to 50MHz / 66MHz / 80MHz.
Also, if I change the clock frequency, do I need to change the FW? If it is yes, where and how should I change it?
I'd like to bump up a question from 2016:
Has the python library for the cyusb.dll been developed/released as yet? Can you give an update on a schedule if there is one?Show Less
I am using the CYUSB3KIT-003 EZ-USB™ FX3 SuperSpeed Explorer Kit connected to an FPGA through the GPIF interface.
The transmission from FPGA to the FX3 works fine, whereas in the other direction I have some issues.
15 out of 32 data signals are driven high properly, i.e. they reach more or less the 3.3V value; the other 17 instead can only reach a value of 2V. In addition, there is a voltage drop on the 22-ohm series resistors of these 17 signals, meaning that there is a current flowing somewhere (about 20-30mA, but still I am wondering how is it possible, since it is connected to an FPGA pin, that is high Z).
Dually, the above 15 data signals are not driven down to 0V, as they reach 1V (and there is the same voltage drop across the series resistors), whereas the other 17 can go down to 0V. All 32 signals are connected to the same FPGA bank.
I have tried everything possible downstream of the FX3 pins, so it seems that the culprit of this cumbersome behavior is the FX3. The firmware code is taken from an example provided and slightly adapted. The GPIF designer was used to generate the .h file to include.
So my question is if I am missing a pin setting or something else in the configuration process. But the strange thing is that half of the pins behave in the opposite manner with respect to the other half.
Thank youShow Less
I'm using fx3 to stream video rgb24, at 60fps i did the changes in the descriptor files, the gpif files and the uvc files of appl note an75779.
for resolution 640x480 at 60fps the video comes proper , see attached file --> 640img ( proper greyscale hv ramp)
but when i change the resolution to 800x600 at 60fps the video is stable, but the video has visible stripes in the hv ramp
see attached file -->800img (hv ramp video stable and locked, but stripes visible). Can anyone provide a solution to this.
I am working on a project which uses FX3 to implement video application. Basically the device works fine. But when it is connected to USB 2.0 port and run bulk-in (video data) and control-in (register read) simultaneously, both bulk-in and control-in will hang. If bulk-in and control-in are not run simultaneously, or they are run in USB 3.0, everything is fine.
My firmware SDK is ver 1.3.4
The problem is the same (or silimar) to those discussed in the following links:
Also I checked the following discussions:
Refering to the solutions in above links, I made changes in FX3 firmware code by the two methods as follows:
1. Use CyU3PUsbSetEpSuspDisableMask() to disable DMA channel suspend during EP0 transfer
2. Write another funcition CyU3PDmaChannelSendData() to replace CyU3PUsbSendEP0Data() for control-in data sending.
Both method is helpful on this issue. The bulk-in and control-in are not hang mostly. But sometimes the data on control-in are corrupted. And sometimes the data transfer (both bulk-in and control-in) still failed (but not frequenctly and can be recoveried by end point reset).
The SDK ver 1.3.4 implements DMA suspend when control-in data needs to be sent out, to workaround data corruption issue in USB 2.0. But based on my issues (and other ones' issues in above links) it seems the DMA suspend operation is not stable. The above two method roll-backs the DMA suspend, but this does'nt resolve the data corruption issue.
I did the following test:
1. Remove control-in code, so there is only bulk-in transfer.
2. Added some code (the code is similar to those in ver 1.3.4 SDK CyU3PUsbSendEP0Data() function) which suspends bulk-in DMA, and then resume DMA after some delays (from some ms to some seconds). I can also see the bulk-in transfer may hang. So it looks the DMA suspend operation is not safe for us to call.
Here are the questions:
1. Why the DMA suspend/resume operation makes the transfer hang?
2. Is there any way to workaround the data corruption and hang issue for simultaneous bulk-in and control-in transfer in USB 2.0? That is, is there anyway to get stable bulk-in/control-in transfer for USB 2.0?
I'm using cypress fx3 to stream a static test pattern as video to vlc, to check for sharpness and greyscales. The format is yuv 422, y:u:y:v (yuy2) as detected by vlc codec information tab, and res is 640x480 at 60fps.
The problem i face is as follows, the video displayed by the vlc is stable(not losing sync) but it is not sharp at the edges(ie. it lacks sharpness), but when i do a video->take snapshot in vlc, the image saved by vlc is same as the original test pattern sent.
Can any one please tell me what settings should i do in vlc to get video decoded properly. I have attached 3 images for ref, test_pattern_640 is the original image sent as video, snapshot the imgae obtained from vlc using vlc->take snapshot, snippet is the video screen captured using the snippet tool while video is playing on vlc.
USBBulkSOurceSink Streming example on CYUSB3KIT-003 stop blinking LED after reflash.
FriendlyName="Cypress FX3 USB StreamerExample Device"
BcdUSB="03 10"It enumerates as
And Streaming test still gives more than 4 MBps (4-5 Gbps).
And trying to modify blink rate according to example gives:
CONTROL OUT transfer
CONTROL OUT transfer failed with Error Code:997
I can still send and receive data on Bulk In and Out endpoint.
The example BootLedBlink - blinks the diode.
What can be the issue?Show Less