USB superspeed peripherals Forum Discussions

Hi,

My application is to receive data from FPGA i.e...,

FPGA --->GPIF -----> FX3 P-Port ----> S0 Port

I am using GpifToUsb firmware which is modified to work for P-Port to S0-Port.

My doubt is how to make sure that data is sent from FPGA to GPIF interface.I am checking producer and consumer events in DMA callback(FX3) .

Is there any way to check from FPGA side that data is transferred to FX3.And also how monitor flags data from FX3 side?

Regards,

Srujana.

I cannot make JTAG debug working for CX3, though I followed the instrinctions reported in the EZUSB user guide. t looks like that EZUSB can communicate with the segger but cannot make the CX3 ANR9 entering into debug mode

SEGGER J-Link GDB Server V6.56c Command Line Version

JLinkARM.dll V6.56c (DLL compiled Dec 11 2019 17:57:56)

Command line: -if jtag -device ARM9 -endian little -speed 4 -port 2331 -swoport 2332 -telnetport 2333 -vd -ir -localhostonly 1 -s

-----GDB Server start settings-----

GDBInit file:                  none

GDB Server Listening port:     2331

SWO raw output listening port: 2332

Terminal I/O port:             2333

Accept remote connection:      localhost only

Generate logfile:              off

Verify download:               on

Init regs on start:            on

Silent mode:                   off

Single run mode:               on

Target connection timeout:     0 ms

------J-Link related settings------

J-Link Host interface:         USB

J-Link script:                 none

J-Link settings file:          none

------Target related settings------

Target device:                 ARM9

Target interface:              JTAG

Target interface speed:        4kHz

Target endian:                 little

Connecting to J-Link...

J-Link is connected.

Firmware: J-Link V10 compiled Dec 11 2019 17:11:27

Hardware: V10.10

S/N: 260108561

OEM: SEGGER-EDU

Feature(s): FlashBP, GDB

Checking target voltage...

Connecting to target failed. Connected correctly?

GDB Server will be closed...

Shutting down...

Could not connect to target.

Please check power, connection and settings.

This should drive to wrong connections from the J'Link probe to the hw but I checked this (the customer board is a replica of the econ danebola board and the JTAG lines go straight from/to the CX3 MCU. Any Idea on what may be wrong?

I have a question which is more related to eclipse: the default behavior of the run / Debug button is 'Debug Local C/C++ application' which results in errors (the elf file is considered as a windows application )

How can I change this behaviour? I deleted the C/C++ app from 'Debug as' list, but this did not help

Thanks much

Are there one cmd line way to build the Fx3 project instead the way build manual click the "Build Project" menu in the Cypress EZ USB Suite?

We  need to build the project on the Git server automatic, when engineer push updated code to the release branch .

Hello dear Cypress community,

I recently bought a J link V8 probe for JTAG debugging on CX3 RDK denebola development kit from e-con Systems.

The problem is that I can't reach the debug interface. I followed the steps to set up the debug configuration :

But with this configuration I have the following error :

I also tried to change the JlinkGDBServer.exe for the JFlash.exe, and with that configuration I reach the loading for launching the debug interface, but it remains stucked at 62% :

On stack overflow they say that this is a typical bug with the CDT plugin of Eclipse.

Could you help me to fix that problem please ?

Best regards,
Vivien

I have a simple question about debugging: I just want to amke sure I buy the right probe so which one should I look for?

Searching for 'CY7C65215' I am suggested by google for the CX3 eval board. What I should do? Buy the eval board? Which probe (vendor and part number please) should I go for? Or should I gat a Segger J-Link? I am lloking for a comfortable and cheap piece of harware which bridges from USB to CX3 JTAG ...

please shade some light

Hi,

I am using PACTRON'S FX3S FPGA Dev Board REV-C. It has two storage port. I used to copy the file from one sd card to another sd card (both are ex fat sd card) using Fatfs file system. To copy the 512mb file from sd0 to sd1 it will take a time of 2 minutes 6 seconds. I am using 32KB  buffer for FATFS read/write buffer. I need to improve Maximum Speed and to decrease the time.

How can I reduce the time duration of copying the file?

Thanks & Regards

S.Ravi Chandrika

Hello,

   I use cyusb3065 and 0v5640 to tranmit image data by DMA. I config stream dma as CY_U3P_DMA_TYPE_MANUAL_MANY_TO_ONE dma, and commit data buffer in its dma callback. And I want to send leader before payload and send trailer after payload. I creat another CY_U3P_DMA_TYPE_MANUAL_OUT dma channel to send leader and trailer. I sent trailer and leader when stream dma callback get a short packet.But when I debug my code, I can see Leader and trailer dma get buffer and commit  buffer successful, but I can't catch leader and trailer in bushound.What's my problem?

   And I confuse how dma channel connet with end point? For example, I commit a buffer in stream dma callback, why dma can send the buffer to stream end point?How dma channel match the end point?

my code:

Stream DMA init:

{

    /* Create a DMA Manual OUT channel for streaming data */

    /* Video streaming Channel is not active till a stream request is received */

stDmaCfg.size                 = 32768;

stDmaCfg.count                = 2;

stDmaCfg.validSckCount        = 2;

stDmaCfg.prodSckId[0]         = CY_U3P_PIB_SOCKET_0;

stDmaCfg.prodSckId[1]         = CY_U3P_PIB_SOCKET_1;

stDmaCfg.consSckId[0]         = CY_U3P_UIB_SOCKET_CONS_3;

stDmaCfg.dmaMode              = CY_U3P_DMA_MODE_BYTE;

stDmaCfg.notification         = CY_U3P_DMA_CB_PROD_EVENT | CY_U3P_DMA_CB_CONS_EVENT | CY_U3P_DMA_CB_SEND_CPLT;

stDmaCfg.cb                   = CyCx3UvcAppDmaCallback;

stDmaCfg.prodHeader           = 0;

stDmaCfg.prodFooter           = 0;

stDmaCfg.consHeader           = 0;

stDmaCfg.prodAvailCount       = 0;

ui32Status = CyU3PDmaMultiChannelCreate (&g_stParameterSetVariable.stDMAHandleStreamIn,

            CY_U3P_DMA_TYPE_MANUAL_MANY_TO_ONE , &stDmaCfg);

    if (ui32Status != CY_U3P_SUCCESS)

    {

        CyU3PDebugPrint (4, "\n\rAppInit:DmaMultiChannelCreate1 Err = 0x%x", ui32Status);

    }

    CyU3PThreadSleep(100);

    ui32Status = CyU3PDmaMultiChannelReset(&g_stParameterSetVariable.stDMAHandleStreamIn);

    if (ui32Status != CY_U3P_SUCCESS)

    {

        CyU3PDebugPrint (4,"\n\rAppInit:MultiChannelReset1 Err = 0x%x", ui32Status);

    }

}

Stream DMA Callback:CyCx3UvcAppDmaCallback

{

...

    if(type ==CY_U3P_DMA_CB_SEND_CPLT )

    {

        status = CyU3PDmaMultiChannelSetXfer (&g_stParameterSetVariable.stDMAHandleStreamIn, 0, 0);

        if (status != CY_U3P_SUCCESS)

        {

            CyU3PDebugPrint (4, "\n\rAplnStrt:SetXfer Err = 0x%x", status);

        }

    CyU3PGpifSMSwitch(CX3_INVALID_GPIF_STATE, CX3_START_SCK0, CX3_INVALID_GPIF_STATE, ALPHA_CX3_START_SCK0, CX3_GPIF_SWITCH_TIMEOUT);

     CyU3PMipicsiWakeup();

    if (status != CY_U3P_SUCCESS)

            {

           CyU3PDeviceReset(CyFalse);

                CyU3PDebugPrint (4, "\n\rAplnStrt:SetXfer Err = 0x%x", status);

            }

    CyCx3_ImageSensor_Wakeup();

    }

    if (type == CY_U3P_DMA_CB_PROD_EVENT)

    {

        /* This is a produce event notification to the CPU. This notification is

         * received upon reception of every buffer. The buffer will not be sent

         * out unless it is explicitly committed. The call shall fail if there

         * is a bus reset / usb disconnect or if there is any application error. */

        status = CyU3PDmaMultiChannelGetBuffer(chHandle, &dmaBuffer, CYU3P_NO_WAIT);

        while (status == CY_U3P_SUCCESS)

        {

        ui32DataCount = ui32DataCount + dmaBuffer.count;

            /* Add Headers*/

            if (dmaBuffer.count < CX3_UVC_DATA_BUF_SIZE)

            {

                EOF = CyTrue;

            }

            status = CyU3PDmaMultiChannelCommitBuffer (chHandle, dmaBuffer.count, 0);

            if (status != CY_U3P_SUCCESS)

            {

            CyU3PDebugPrint(4, "\r\nCommit Error:0x%x\r\n", status);

                CyU3PEventSet(&glCx3Event, CX3_DMA_RESET_EVENT, CYU3P_EVENT_OR);

                break;

            }

           status = CyU3PDmaMultiChannelGetBuffer(chHandle, &dmaBuffer, CYU3P_NO_WAIT);

        }

    }

    else if (type == CY_U3P_DMA_CB_CONS_EVENT)

    {

        if(EOF == CyTrue)

        {

        EOF = CyFalse;

         status = CyU3PMipicsiSleep();

         status = CyCx3_ImageSensor_Sleep();

         CyU3PBusyWait (1000);

        //Fill Trailer

         __SetTrailerBuffer(&stTrailer);

        //Send Trailer

        SendDMAMessage(&stTrailer, sizeof(IMAGE_TRAILER));

        //Fill Leader

        __SetLeaderBuffer(&stLeader);

        //Send Leader

        SendDMAMessage(&stLeader, sizeof(IMAGE_LEADER));

    }

...

}

Leader Trailer DMA init

{

   stEP1OutDmaCfg.size  = 1024;

   stEP1OutDmaCfg.count = 3;

   stEP1OutDmaCfg.prodSckId = CY_U3P_CPU_SOCKET_PROD;

   stEP1OutDmaCfg.consSckId = CY_U3P_UIB_SOCKET_CONS_4;

   stEP1OutDmaCfg.dmaMode = CY_U3P_DMA_MODE_BYTE;

   stEP1OutDmaCfg.notification = 0;

   stEP1OutDmaCfg.cb = 0;

   stEP1OutDmaCfg.prodHeader = 0;

   stEP1OutDmaCfg.prodFooter = 0;

   stEP1OutDmaCfg.consHeader = 0;

   stEP1OutDmaCfg.prodAvailCount = 0;

    ui32Status = CyU3PDmaChannelCreate (&g_stParameterSetVariable.stLeaderTrailer,

            CY_U3P_DMA_TYPE_MANUAL_OUT, &stEP1OutDmaCfg);

    if (ui32Status != DH_STATUS_SUCCESS)

    {

    CyU3PDebugPrint (4, "LeaderTrailerDma Error: 0x%x\n\r", ui32Status);

    g_testparam = ui32Status;

    return ui32Status;

    }

    else

    {

    CyU3PDebugPrint(4, "\r\n LeaderTrailerDma success\r\n");

    }

    // 设置DMA通道传输大小

    ui32Status = CyU3PDmaChannelSetXfer (&g_stParameterSetVariable.stLeaderTrailer, 0);

    if (ui32Status != DH_STATUS_SUCCESS)

    {

    return ui32Status;

    }

}

Send Leader and Trailer function:

void SendDMAMessage(uint8_t* buffer, uint8_t len)

{

    unsigned int ui32Status = 0;

     CyU3PDmaBuffer_t buf_p;

    CyU3PDmaBuffer_t stOutBuffer;

     ui32Status = CyU3PDmaChannelGetBuffer(&g_stParameterSetVariable.stLeaderTrailer, &stOutBuffer, 0);

     if (ui32Status != CY_U3P_SUCCESS)

     {

          CyU3PDebugPrint (4, "\r\nGetBuffer Fail = %d\n", ui32Status);

     }

     else

     {

          CyU3PDebugPrint (4, "\r\nGetBuffer success\r\n");

     }

     CyU3PMemCopy(stOutBuffer.buffer, buffer, len);

     for (i = 0; i < len; i++)

     {

            CyU3PDebugPrint(4, "0x%x\r\n", stOutBuffer.buffer);

     }

     ui32Status = CyU3PDmaChannelCommitBuffer(&g_stParameterSetVariable.stLeaderTrailer, len, 0);

     if(ui32Status != CY_U3P_SUCCESS)

     {

          CyU3PDebugPrint (4, "\r\nSendBuffer Fail = %d\n", ui32Status);

     }

     else

      {

          CyU3PDebugPrint (4, "\r\nSendBuffer success\r\n");

      }

     ui32Status = CyU3PDmaChannelDiscardBuffer (&g_stParameterSetVariable.stLeaderTrailer);

}

Hi,

I am using PACTRON'S FX3S FPGA Dev Board REV-C and cypress EZ-USB SUITE. My question is

1.How to see the consumed memory after build the project?

2.If I build the code this error occurred  region `DATA' overflowed by 12156 bytes. `.bss' will not fit in region `DATA' .So I change the fx3.ld file and I update the CY_U3P_MEM_HEAP_BASE in cyfxtx.c file. In fx3.ld file I update sys_mem and data like this:

     MEMORY

     {

      I-TCM : ORIGIN = 0x100 LENGTH = 0x3F00

      SYS_MEM : ORIGIN = 0x40003000 LENGTH = 0x2D000

      DATA : ORIGIN = 0x40030000 LENGTH = 0x8000

     }     

But still the error occurs. So what I should do to solve the error?

Thanks & Regards

S. Ravi Chandrika

Dear All:

Our FX3 connects to a lot of slave devices by I2C, and I found the general call address from the I2C spec as the following figure:

I don't realize the meaning exactly.

It means I can get ALL slave devices ID by the general call address with (0x00, 0x04)?

ex: FX3 connects to 3 devices which slave address is 0x0A, 0x0B & 0x0C respectively.

      After writing (0x00, 0x04), FX3 will receive (0x0A, 0x0B, 0x0C)?

Hope guys could provide me some suggestions,

Thank you!

Hughes

Hi,

I'm transfering data from FX3 to FPGA and the interface i'm using is GPIF II.

Based on AN65974  GPIF II files i have created a state machine and modified interface settings according to it.Now i'm using two flags(active low signals)  flagC(DMA_READY) and flag D(watermark flag).Through Control Center i'm transfering the data to FPGA ,but the data i'm receiving  on FPGA side is 0000 and here the flags are initially 1(low) and after programming flag C is 0(high) and flagD is 1. If flagC is 0 means the buffer is having some data but i'm not able to receive data on FPGA side.

Kindly,anyone let me know the reason for this issue.

Regards,

Aswini