USB superspeed peripherals Forum Discussions
Hello,
I've developed a ADC board for a FX3 SuperSpeed Explorer Kit to be plugged onto and would like to make it available to others. I use a modified firmware that is provided here in the forum.
The firmware is released under the Cypress Software License Agreement. But I'm not a lawyer, not even a native English speaker. As I understand the license I'm not allowed to distribute the source code, but the clause about object code is very unclear to me:
License to Distribute Licensed Software in Object Code Form. Subject
to the terms and conditions set forth herein, Cypress hereby grants to Licensee
a worldwide, non-exclusive, non-transferable, royalty-free license to
reproduce, sublicense and distribute the Firmware, Drivers, and/or Application
Software, and derivative works thereof, in object code form only, with the
applicable Licensee Product.
What exactly does that mean? I do not sell anything, I only provide the documentation of the device for others to build it themselves (and buy a SuperSpeed Explorer Kit themselves). Is the documentation considered a product I can distribute the firmware with (e.g. have the binary in the repo on GitHub)?
Unfortunately the firmware license issue for sigrok is also still unclear (see https://community.infineon.com/t5/USB-superspeed-peripherals/Sigrok-needs-authorization-to-use-the-Logic-Analyzer-firmware-blob/m-p/367526), therefore the pull request to add FX3 support is till open.
Best regards
Stefan
Hi there,
The SRAM Master GPIF Example doesn't work in USB 2.0 mode in SDK 1.3.4. Control Center doesn't see device after programming via USB (cypress kit and custom board too). PMODE settings OK. To test/simulate it, just switch USB to 2.0 here:
apiRetStatus = CyU3PConnectState (CyTrue, /*CyTrue*/CyFalse); // USB 2.0
Getting the error: CyU3PSetEpConfig 0x01 failed, Error code = 64
If I comment out CyFxSRAMApplnStart () like below, it works and recognized in Control Center:
case CY_U3P_USB_EVENT_SETCONF: /* Stop the application before re-starting. */
if (glIsApplnActive)
{
CyFxSRAMApplnStop ();
}
/* Disable USB Low Power Mode Transitions once the device has been configured. */
CyU3PUsbLPMDisable ();
//CyFxSRAMApplnStart (); // - this causes trouble
break;
Any help is appreciated, thanks!
Show LessHi, @Ajeethkumar_P
I have encountered the same striping case discussed on this page, under the same MultiChannel DMA conditions.
Since I am unable to comment on the above thread, I am starting a new thread here.
Is it possible for you to tell us how to configure the FX3 side to solve this problem?
* Sorry, I can't give you our in-house information right away, so I would first like to know what information you have that you can write here, if any.
I am using the DMA_RDY_TH0 and DMA_RDY_TH1 actions in my GPIF state machine to determine when an error state can be left and am looking for how exactly these transitions work within GPIF. Looking online, they seem to assert as long as there is at least 1 buffer available to be filled in the specific thread but after reading this thread I am not sure if I need to insert an IN_DATA or DR_DATA action into the state I am using DMA_RDY_TH0/ DMA_RDY_TH1 for them to function.
Can I get clarification if there are any requirements for states using the DMA_RDY_TH0 and DMA_RDY_TH1 transitions and whether a IN_DATA or DR_DATA action is required?
Show LessHello,
I'm debugging the FX3 with double functions, uvc+msc, now the msc works well, but uvc will get errors "DMA Reset Event: Commit buffer failure", I check the bushound, find that the host is keepping requesting the Test unit ready, I think it will effect the uvc dma buffer commit, and casing frame miss, can you help on this? thanks.
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Hello all,
I am unable to save the still capture of full resolution(3840x2160) while streaming lower resolution(640x480),in cx3.I can able to stream the full resolution by getting full buffer, but while capturing the still of full resolution while streaming lower resolution I can't able to get full buffer like when it is streaming and the image is not saving in the PC.
Below I am attaching the debug logs of that streaming resolution and at the time of still capture
Prod = 50 Cons = 49 Prtl_Sz = 2400 Frm_Sz = 1843200 B this is debug log of streaming resolution of 720p resolution
when still trigger of 4k resolution while streaming 720p resolutioni m not getting full buffer
**DISCARDED 1**-450Prod = 84 Cons = 84 Prtl_Sz = 36816 Frm_Sz = 3129360 B
the original buffer of 4k resolution
Prod = 450 Cons = 447 Prtl_Sz = 21600 Frm_Sz = 16588800 B
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Hi,
It's possible to have a source code of the demo board DEMO_FX3_U3V_CAM01 ?
BR,
Mihail
We are evaluating the watchdog timer in the CX3 controller, and during an ESD test, we observed that the watchdog timer is not functioning as expected. We are using the Denebola RDK kit for this evaluation.
The CX3 controller experiences the following issues during the ESD test, even though the watchdog timer has been configured:
Issue 1: While applying an external voltage of -4 kVA, the CX3 becomes unresponsive. We expected the watchdog timer to reset the CX3, but it does not reset. In such cases, we manually toggle the reset pin of CX3 to recover the device.
Issue 2: When applying external voltage, the device undergoes continuous resets. During enumeration, the "CyU3PMipicsiInit()" function throws an error, specifically "CY_U3P_ERROR_TIMEOUT," after the device reset. Despite externally toggling the CX3 reset pin, we couldn't recover the CX3.
We conducted this test in two scenarios:
- External crystal clock source provided to CLKIN_32 pin of CX3.
- External crystal clock not provided to CLKIN_32 pin.
In both cases, the issues persisted. Could you please provide your thoughts on this observation and guide us on how to effectively use the watchdog timer with CX3?
Hi
We are usingCypress EZ-USB FX3 and TUSB73x0 , and got some errors about usb host controller transfaction.
1200 x 1200 or 1920 x 1200 are picture resolution (number of pixels for each picture)
16 is YUV encoding, each pixel needs 16 bit
30/20 are frame rates
If we use bulk transactions. Some times we got those errors from kernel messages, it's not easy to get errors, but we got those errors from time to time.
[Thu Apr 6 20:28:53 2023] uvcvideo: Non-zero status (-71) in video completion handler.
[Thu Apr 6 20:28:53 2023] xhci_hcd 0000:77:00.0: Transfer error for slot 2 ep 6 on endpoint
[Thu Apr 6 20:28:53 2023] uvcvideo: Non-zero status (-71) in video completion handler.
[Thu Apr 6 20:28:53 2023] xhci_hcd 0000:77:00.0: Transfer error for slot 2 ep 6 on endpoint
And We use a USB 3.0 protocol analyzer in between, for bulk transaction, when the issue happens, we captured lots of error. Hoster R. and retry.
I just wonder why HosterR did, and who knows this error, can I rule out Cypress? Thanks
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/%E8%B6%85%E9%AB%98%E9%80%9FUSB%E5%A4%96%E8%AE%BE/Cause-of-host-EHCI-USB-transaction-errors-between-CY-EZ-USB-FX3/td-p/638833
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