USB superspeed peripherals Forum Discussions

I test and try to understand the code of slave FIFO application AN65974. I have a question: What binds the endpont with the created DMA channels? In the function "CyFxSlFifoApplnStart", endpoint is configured and two DMA channels are created. But I have not see any lines of codes that establishes the relationship between the configured endpoint and DMA channels. If I make a small modification on the value of CY_FX_EP_PRODUCER and CY_FX_EP_CONSUMER to 0x06 and 0x86, the communication becomes unsuccessful. This proves the original EP1 corresponds to the created DMA channels. I attach the AN65974 Firmware and hope to get the answer. Thank you.

Hi, 

I am trying to connect the OV8865 camera sensor to the e-con CX3 Denebola board.  The I2C seems to through an error 74: "CY_U3P_ERROR_FAILURE,/**< Failure due to a non-specific system error. */". The MCLK and the voltages have been verified satisfactorily. Please do guide me on what the problem could and how it can be rectified.

Our sensor outputs RAW8 data over 4 lane MIPI CSI-2. To achieve highest transfer rate between MIPI CSI-2 receiver and GPIF II we need to use 24-bit wide transfers, which fully utilize GPIF II input bus. According to page 9 of TRM, the only mode which fully utilizes 24-bit bus is RGB888.

A possible solution to this issue is packing, mentioned on page 10 of TRM:

Packing more than one pixel per PCLK is possible. For example, selecting the “MIPI CSI input -Data format" configured as "RAW8" and the “MIPI interface configuration – data format” as a 24bit format (RGB888) will output three pixel data per PCLK.

It's unclear, however, where/how to configure the mentioned "MIPI CSI input -Data format" and "MIPI interface configuration – data format" via the CX3 API. The API has CyU3PMipicsiSetIntfParams() function, which has CyU3PMipicsiCfg_t struct parameter with CyU3PMipicsiDataFormat_t dataFormat field. This makes it possible to only configure a single format, not two different formats.

What CX3 API can I use to configure two different formats to enable packing?

I can think of several possibilities, but none is documented:

Should I use CY_U3P_CSI_DF_RAW8 format in CyU3PMipicsiSetIntfParams(), but set CyU3PMipicsiGpifLoad(CY_U3P_MIPICSI_BUS_24, ...)?

Should I do as above, but also set CX3_CONFIG_CTRL[DATA MODE] register to non-zero value? (what value?)

Should I configure CY_U3P_CSI_DF_RGB888 format for CX3, while the sensor output is sill RAW8?

Please, provide clear instructions.

Thank you in advance.

I am trying to use the AN75779 example project .I want to display the UVC device in Control Center . So that I can test SensorGetBrightness and SensorSetBrightness.

Hi, 

I am working on a project with UVC hardware. I am taking the analog video data from an ADC with an FPGA and send the pixel data to USB FX3 chip. I am using an FPGA board and the ADC board is seperate from this board, they are connected via connectors. LVDS outputs of ADC should be routed differentially on PCB, which is fine because i can do that since i design the ADC board. However, there is a problem, LVDS traces between the FPGA board connectors and FPGA chip should be routed differentially. I was previosly using the FPGA board of Ztex 2.14e, which includes an FPGA chip and Cypress FX3 chip, but this board's IO traces are not routed differentially.

So, here is my question, do you know any alternative FPGA boards which includes an FPGA chip and Cypress FX3 chip?  Also, the USB chip should be programmable on this board since i need to use the FX3 chip with UVC hardware.