The meaning latch-up current >200mA

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Henry
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When I read CYUSB301X, I read above current list.

I cannot understand the meaning latch-up current.

What status is latch-up?

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Rashi_Vatsa
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Hello,

As you might be aware that latch-up is a condition where a low impedance path is created between a supply pin and ground. This condition is caused by a trigger (current injection or overvoltage), but once activated, the low impedance path remains even after the trigger is no longer present. This low impedance path may cause system upset or catastrophic damage due to excessive current levels. The Latch-Up condition typically requires a power cycle to eliminate the low impedance path. Latch-Up is not a risk if the voltage and current levels applied to the device adhere to the absolute maximum ratings.

So, if the current level greater than 180 mA is applied to FX3’s I/O, the latch up condition can be triggered.

Regards,
Rashi

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Rashi_Vatsa
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Hello,

Apologies for the delay in the response

The latch up current value is 180mA. There is a mistake in the FX3 datasheet. We will revise the datasheet in the next release.

Regards,
Rashi
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Hello,

Can I know the exact meaning about latch-up?

I understand that it's consumed current when all operation is busy and all I/O is operating.

Is it right?

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Rashi_Vatsa
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5 likes given 500 solutions authored 1000 replies posted

Hello,

As you might be aware that latch-up is a condition where a low impedance path is created between a supply pin and ground. This condition is caused by a trigger (current injection or overvoltage), but once activated, the low impedance path remains even after the trigger is no longer present. This low impedance path may cause system upset or catastrophic damage due to excessive current levels. The Latch-Up condition typically requires a power cycle to eliminate the low impedance path. Latch-Up is not a risk if the voltage and current levels applied to the device adhere to the absolute maximum ratings.

So, if the current level greater than 180 mA is applied to FX3’s I/O, the latch up condition can be triggered.

Regards,
Rashi
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Henry,

Latchup is a condition that can occur because of the input ESD diodes placed on the front of GPIO inputs. 

Len_CONSULTRON_4-1625832381705.png

The latch-up condition can occur on DclampH diode if the input/output voltage > VDD+0.5V with a current through the diode <-180mA.

The latch-up (also known as latch-down) condition can occur on DclampL diode if the input/output voltage < VSS-0.5V with a current through the diode > 180mA.

The latch-up/latch-down occurs because the ESD protection diode becomes forward biased (Vfwd = 0.5V).  If the current through the diode exceeds 180mA for a short amount of time, the diode thermally permanently fuses the PN junction.  Once fused it acts as a short circuit to either VDD if DclampH is fused or VSS if DclampL is fused.  This is why it is called latch-up.

If a latchup condition occurs, it can be detected by measuring the resistance between the pin and VDD or VSS (GND).  Normally with the ESD diode not fused, the resistance will be high with the + and - terminals in one direction and about 0.5V with the terminals in the other directions.   A permanently fused ESD diode will be very low (<10ohms) with the resistance meter terminals in either direction.

Len
"Engineering is an Art. The Art of Compromise."
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