Devices RTSSM out of sync with host

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cross mob
Anonymous
Not applicable

With an USB3 device using the cypress FX3 we face the situation where the devices RTS state machine gets out of sync with the hosts state machine during restart of the system: While the device goes from 'U1' to 'U2' state the host changes into 'Polling.LFPS' state (see attached USB trace). As consequence the device is not operational.

As Host platform we use a PC with Intel i7-6700 with xHCI root hub running Win 10; The USB LPM power option is set to 'Moderat power settings'.

u2_after_u1_after_get_status_lost.PNG

Observations:

To eliminate the problem we can change the LPM power options in Windows to "Off" - as this is a modification on host side this is not a preferred solution.

Also preventing the transition from 'U1' to 'U2' state (by returning CyFalse in LPMRequestCallback when 'U2' is requested) eliminates the problem - but then complience to USB Chapter 9 is lost.

Question:

How can we get our device operate reliably with the host when the LPM power options is set to 'Moderat power settings' which is the default configuration in Win 10?

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1 Solution

Roland,

I can not comment on why the host is entering into LFPS.Polling instead of sending LFPS Exit. Please check with host controller vendor.

Here is the Exit from U2 requirements from the USB 3.0 Spec.

Section 7.5.8.2 Exit from U2

• A downstream port shall transition to eSS.Disabled when directed.

• A downstream port shall transition to Rx.Detect upon detection of a far-end high-impedance

receiver termination (ZRX-HIGH-IMP-DC-POS) defined in Table 6-21.

• A downstream port shall transition to Rx.Detect when directed to issue Warm Reset.

• An upstream port shall transition to Rx.Detect when Warm Reset is detected.

• A self-powered upstream port shall transition to eSS.Disabled upon not detecting valid Vbus as

defined in Section 11.4.5.

• The port shall transition to Recovery upon successful completion of a LFPS handshake meeting

the U2 LFPS exit signaling defined in Section 6.9.2.

• The port shall transition to eSS.Inactive upon the 2-ms LFPS handshake timer timeout

(tNoLFPSResponseTimeout) and a successful LFPS handshake meeting the U2 LFPS exit

handshake signaling in Section 6.9.2 is not achieved.

pastedImage_1.png

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4 Replies
KandlaguntaR_36
Moderator
Moderator
Moderator
25 solutions authored 10 solutions authored 5 solutions authored

When the link is U1, the link partners may go to U2 when the U2 inactivity timeout. In this case, the device is going to U2.
But the host is going to Polling. LFPS.

In general, the device will come to U0 when the host issues LFPS exit. This is not happening in this case.

However, the host is sending polling LFPS. If the device is not responding to polling.LFPS, the host should issue WARM RESET. Is this happening this case? I guess NO.

1. Can you please check the same functionality with any other PC (other than Intel i7-6700)?

2. Please load the USB Bulk Sourcesink example firmware and collect the log while restarting the PC i.e Intel i7-6700.

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Anonymous
Not applicable

The host does not send the expected WARM RESET when it gets no response to polling.LFPS.

To 1: The device is tested within many other environments and the problem was seen only with this specific PC.

To 2: When performing a PC restart with the USB Bulk Sourcesink running on the FX3 we do not see the problem but the device does not go to U2 state. As written in initial problem description we face the problem only when our device enters the U2 state. We would expect the device  change from U2 to Rx.Detect state due to detected LFPS Timeout disconnect during system restart.

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Anonymous
Not applicable

Attached trace with USB Bulk Sourcesink.

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Roland,

I can not comment on why the host is entering into LFPS.Polling instead of sending LFPS Exit. Please check with host controller vendor.

Here is the Exit from U2 requirements from the USB 3.0 Spec.

Section 7.5.8.2 Exit from U2

• A downstream port shall transition to eSS.Disabled when directed.

• A downstream port shall transition to Rx.Detect upon detection of a far-end high-impedance

receiver termination (ZRX-HIGH-IMP-DC-POS) defined in Table 6-21.

• A downstream port shall transition to Rx.Detect when directed to issue Warm Reset.

• An upstream port shall transition to Rx.Detect when Warm Reset is detected.

• A self-powered upstream port shall transition to eSS.Disabled upon not detecting valid Vbus as

defined in Section 11.4.5.

• The port shall transition to Recovery upon successful completion of a LFPS handshake meeting

the U2 LFPS exit signaling defined in Section 6.9.2.

• The port shall transition to eSS.Inactive upon the 2-ms LFPS handshake timer timeout

(tNoLFPSResponseTimeout) and a successful LFPS handshake meeting the U2 LFPS exit

handshake signaling in Section 6.9.2 is not achieved.

pastedImage_1.png

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