USB low-full-high speed peripherals Forum Discussions
I wrote tech support two days ago and got no answers, so hopefully someone else has run into this and can help me.
First problem is the firmware appears to have some kind of problem I can't track down. Unfortunately I don't have any decent debugging tools, but the board I'm working with has 4 LEDs connected to port E. We didn't have the money to buy the Keil compiler in the budget, so I am using SDCC. The framework is essentially the same as the Keil/Cypress framework with some tweaks for the different syntax in the SDCC compiler.
Sometimes I download the firmware to the target and it works fine. Other times I make a minor change to the firmware, download it, and it doesn't work. The change can be something very benign. It appears to be sensitive to where the code is in memory. Moving one byte one way or the other can kill it. Adding more code might make it work again.
I set up a counter in the TF_Poll() function that caused the 4 LEDs to count up. When a version of the firmware doesn't work, the LEDs continue counting, so it appears the firmware process loop is running fine, the problem is in the connection to the host. For some reason the firmware is dropping it.
Has anybody run into this sort of thing before and if so, how do you solve it?
The second problem has to do with an ISO IN endpoint. The data load passing through the USB is very low, but we have had some speed issues. I first tried doing all I/O on the control endpoint. When I got far enough along to see through put timing, I was seeing 4ms per transaction, which is way too slow. We can tolerate a couple of microframe delay (~250us), but 4ms is way too long.
I was away from this part of the project for a few months. (Another area was demanding my attention.) Back in April when I was talking to tech support about this, they recommended I change the OUT to a Bulk endpoint and the IN to Isochronous endpoint. I already was using a Bulk endpoint for some OUT data, so it was fairly easy to get all data out on the Bulk endpoint. I analyzed the CyStream example and set up an ISO IN endpoint. I figured out a way to do all input with one ISO IN.
Unfortunately, the ISO IN endpoint was very unreliable. When my application read the buffer with XferData, it often returns 0. I put in code to do a second read in case the data I'm looking for is in the other buffer (I have it set up as a double buffer). I only get valid data about 25% of the time. I tried calling XferData right after the write that would trigger the read, and I tried it with a delay of 125us to 250us. It made no difference. I only got data about 25% of the time. The rest of the time the buffer was full of 0s and the length returned was 0.
I know ISO is not guaranteed data delivery, but a 75% data loss rate is pretty bad.
Anybody have any suggestions? I can post code snippets if that will help.
Bill
Show LessWindows 7 64 68013a 128 pin on a custom board with no eeprom
CYUSB.sys and CYUSB.inf, INC and LIB files are from CyConsole 3.4.6
The board enumerates using vid/pid 04b4 / 8613 as "Cypress EZ-USB FX2LP - EEPROM missing"
A old bulk/fifo with gpif example builds and successfully downloads using Keil UV2 and EZ-USB Interface (1.7.0.2)
Once downloaded it will re-enumerate showing "Cypress USB Generic Driver " in the Device Manager" but is stopped with a code10 error making it unavailable to CyConsole etc.
It worked with with the previous cyusb.sys driver (04B4 / 1004) in XP/32 which does not work with W-7 / 64
I've spent a lot of time searching for a similar post and missed it if this is one. Any suggestions will be appreciated.
Here are snippets from the Keil UV2 build and inf files:
dscr.a51
DeviceDscr:
dw 0B404H ; Vendor ID
dw 01486H ; Product ID
// dw 01386H ; Product ID I have tried all 3 including pid 1004
cyusb.inf
;for x64 platforms
[Device.NTamd64]
;for x64 platforms
[Device.NTamd64]
%VID_04B4&PID_8613.DeviceDesc%=CyUsb, USB\VID_04B4&PID_8613
%VID_04B4&PID_8614.DeviceDesc%=CyUsb, USB\VID_04B4&PID_8614
[Strings];for x64 platforms
[Device.NTamd64]
VID_04B4&PID_8613.DeviceDesc="Cypress EZ-USB FX2LP - EEPROM missing"
VID_04B4&PID_8614.DeviceDesc="Cypress USB Generic Driver (3.4.6.000)"
In the datasheet, command write example doesn't say anything about SLWR line. But at the the timing diagrams (Figure 11-4. Command Asynchronous Write Timing Diagram) I see that SLWR line is strobed... Now my question is that should I do this while writing to Descriptor RAM??
Show LessI wonder how to erase a flash with bad firmware downloaded to it? I am using CY3686 (CY7c68033's EVM) for testing; and obviously downloaded a buggy firmware to it using NandMfg. Now, I can no longer program it using NandMfg because the device is not recognizable by NandMfg, although can be recognized by the other Cypress utility like CyConsole. I wonder if there is any tools to erase the flash chip? [note: the EVM is ok because if I changed the flash chip i can still access it normally] Thanks in advance.
Show Less Hi
I am using cypress cy7c68013a-100a and driver cyusb.sys in "Cypress Suite USB 3.4.6"
for win 7 in wlh folder.
and change .inf file (my .inf is attached)
and build a board according AN15456 in this address
When I connect on some PC's running Windows 7, i see "the device is not recognized" and "this device connot start(code10)"!
I checked my hardware again and again.but i see this error yet
* i can't find 'tps3820-33' for reset pin so i use a 100k from reset pin to 3.3v and a 0.1uf to gnd *
'tps3820-33' is my problem?!!
Thanks in advance for any help you can offer
sam
We are using the bulk loop fifo example with a few modifications with the cy7c68013a 56 pin FX2LP.
The states are as follows:
GPIO PA2 is used to reset the Cypress cy7c4245 4K word fifo and a FPGA
GPIO PA3 is used to arm the FPGA
The FPGA waits for a external trigger
Once triggered the FPGA drops /WEN and latches time stamps(2 words), antenna rotation count (1 word) in the first 3 words and 4093 ADC samples into the remaining FIFO space until fifo full (/FF) drops. This is all completed with the ADC 25MHz sample clock
The fpga raises WEN and signals done via PA3 to the FX2LP
This works very well.
Now the problem:
With EP6 configured as an endpoint we trigger the GPIF as a master and move the fifo data to the host but with a problem. If we do not configure our S3 state to lower /REN and /OE then REN toggles instead of staying low so we read the fifo on every 3rd or 4th IFCLK/FIFO RCLK so it takes 500us to empty the fifo but we get all of the data and not empty fifo (/EF) returns low (i.e. empty).
If we set IF /EF=1 AND /EF=1 go to S3 else go to idle and configure /WEN and /OE also using /EF we empty the fifo in an expected 85.3us (1/48MHz * 4096) and we see /FE go low as it should. But we do not get a GPIF idle, ( it is the blue highlighted line below) and hang.
Setup_FLOWSTATE_Read(); // setup FLOWSTATE registers for FIFO Read operation
SYNCDELAY;
GPIFTRIG = GPIFTRIGRD | GPIF_EP6; // launch GPIF FIFO READ Transaction to EP6 FIFO
SYNCDELAY;
while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 GPIF Done bit
We have the RDY, CTL, /OE, IFCLK connected to /REN, /EF, RCLK, /OE correctly and we do drain the fifo.
I realize this is a bit sketchy. I'm hopeful someone has seen similar behavior before and has a suggestion or two where to look.
Show LessCould someone help with the GPIFTCB setting found in the CY3686 firmware? I am new to cypress programming and studying the CY3686FW for use with CY7C68033. I found that, in inand.c's nReadPages() and nWritePages(), GPIFTCB is set to 511 (cNAND_DSIZE), instead of using the sector size which is 512. I wonder why it is so.
I have enclosed the inand.c and inand.h files from the CY3686FW. cNAND_DSIZE is defined at line 414 of inand.h
Thanks in advance.
Show LessI am totally confused about REVCTL and AUTOOUT. I have an FX2LP with a CPLD connected to the external fifo pins. The CPLD does nothing right now, but will soon read from EP2 and write to EP6. In the mean time, I'm trying to figure out the FX2LP side's configuration. I have it set for the following: EP2 = valid, bulk, out, 512 x2. EP4 = valid, bulk, out, 512 x2. EP6 = valid, bulk, IN, 512 x2. EP8 valid, bulk, IN, 512 x2.
My host is doing the following sequence:
1) usb_control_msg a vendorcmd (see case 0xBF in vendorcmd handler in attached bwtkusb.c) that reads 10 bytes. These 10 bytes are EP2FIFOFLGS, EP6FIFOFLGS, EP2FIFOBCH, EP2FIFOBCL, EP2468STAT, EP2CS, EP2FIFOBUF[0], EP2FIFOBUF[1], EP2FIFOBUF[2] and EP2FIFOBUF[3]
2) usb_bulk_write of 4 bytes to EP2
3) repeat step one, to compare all the flags and data.
I started by using the bulkloop firmware as an example. Now, after reading through the EZ-USB TRM thoroughly I have modified the firmware to set it up for external fifo. The problem is that as soon as I try to follow the recommendation in the TRM to set REVCTL[1:0] to 11b, and set EP2's AUTOOUT=1, then trying to write to that endpoint from the host results in a timeout. I tried setting OUTPKTEND=0x82 also, but does not affect anything. I also tried doing a FIFORESET=0x80; FIFORESET=2; FIFORESET=0; prior to the OUTPKTEND=1 line, but that doesn't help either.
The ONLY configuration I can use that allows me to send data to the endpoint is 1) REVCTL[1:0] = 00b, EP2FIFOCFG.AUTOOUT=0 or 2) REVCTL[1:0]=01b, EP2FIFOCFG.AUTOOUT=0. In either case, I can SEE the data I sent in EP2FIFOBUF[0]...EP2FIFOBUF[3].. and EP2's Empty flag is no longer set. However, EP2FIFOFLGS are report that the fifo is empty.
Unless I've misunderstood the TRM, then I believe what I want is to have REVCTL=3, EP2FIFOCFG.AUTOOUT=1, and that this means I may have to "prime the pump" (as stated in TRM) by "initially arming the endpoints (OUTPKTEND w/SKIP=1 to pass packets to host)." Which is baffling in and of itself.. OUTPKTEND is for "OUT".. what does that have to do with "passing packets TO HOST"???????
While its true that nothing is sucking data out of the fifo yet, after i send 4 bytes from the host (which i can't even do) to EP2, I should see EP2FIFOBCL=4, EP2FIFOFLGS=NOTEMPTY,... but instead i see EP2FIFOBCL=0, EP2FIFOFLGS=EMPTY, EP2CS.EMPTY=0, EP2BCL=2. I want to simply send 4 bytes from the host and have it IMMEDIATELY available on the fifo pins with no interaction from the 8051. This shouldn't be that difficult to accomplish, but I'm getting meeting nothing but frustration. Anyone know what is going on here?
The only change I made to fw.c was in main(), just before the call to TD_Init(). I put this: REVCTL=0x03;
thank you for any help!
Show LessHello everybody
i am new here and this is my first post so please be patient with me.
I am using fx2lp (cy7c60813A) for transfering images from my camera. As a master i use FPGA Cyclone3. Now, i have setup everything and implemented (adjusted) a state machine in VHDL for bulk transfer of data. I am using the EP2,EP6 and EP8 configuration from TRM (i think it is number 4). It is valid. I should also point out that the configuration i am using worked previously just fine. Yesterday i had to re-install my system. So i deleted everything and install WinXp (32-bit) and cypress driver (3.4.5). I downloaded my FPGA configration, and any transfere i try always endups in timeout.
I decided to follow things with signal tap and the logic is ok. I also hooked up my scope on FullFLAG and it is always HIGH (the USB FIFO never goes full) My USB_CS, USB_WR and USB_OE pins are LOW during writing procedure while USB_RD is high. Fifo ADDRESS is set to '00' (endpoint 2). Now when i start CyConsole the device is recognized with all configurations properly initialized. In my application i use CyApi and i can read my device, configraion and enpoints with no problem. BUT TRANSFER OVER THOSE NEVER HAPPENS. I just do not understand what is happening. I also dont know what eles too try.
I tryed the bulkloop example provided by cypress and it works fine. My application also worked fine before i reinstalled my system. I have installed the drivers i used in previous times, but nothing works. Please tell me what can i do, what should i try what should i look for in moving ahead.
kind regards
mirza
Show LessHI
descreption:
I fill ep2 with 512 bytes with value of 05 using "cypress usb console" and "my own VS2008 program". it successfully writes data to ep2. following trm page 9-18 external logic(avr mega8535) checks flagc(empty) when is not asserted(high) it reads data and shows on LCD. after 512 reads empty flag will be asserted.
Problem:
1- The read data are not 05 they are 65-165-218-138-201-49-174-30-173-27-146 ....(they are not random because with defferent tries results are the same)
2- because only 2 writes are successful i think this external reads will not empty the fifo
am I reading from wrong fifo OR an additional stage other than TRM page 9-18 should be done to empty fhe fifo?
regards
Show Less