USB low-full-high speed peripherals Forum Discussions
Cypress recently introduced a new family of USB parts. The first part in our USB-Serial family is the USB-UART Bridge controller. This is a fully integrated controller that allows connectivity to devices with a UART interface. The device includes a USB 2.0 Full-Speed Controller, Voltage Regulator and internal EEPROM in a 28-pin SSOP package. These features make the product ideal for upgrading legacy peripherals to USB interface.
For more information, please visit www.cypress.com/
Thanks,
Anup
Show LessHi,
I am working on slave FIFO intereface for FX2LP usb controller. I am configuring the FIFO in auto mode.
Once the master gives the 8bit data to the slave FIFO bus (FD0-FD7), I am expecting the data to be commited to the USB endpoint buffer with the following code segment :
I am using EP2 as bulk in endpoint and I am disabling all other endpoints
SYNCDELAY; //
EP2CFG = 0xE0; // bulk endpoint and quad buffering
SYNCDELAY; //
EP6CFG &= 0x7F; //clear valid bit
SYNCDELAY;
EP4CFG &= 0x7F; // clear valid bit
SYNCDELAY; //
EP8CFG &= 0x7F; // clear valid bit
SYNCDELAY;
FIFORESET = 0x80; // activate NAK-ALL to avoid race conditions
SYNCDELAY; // see TRM section 15.14
FIFORESET = 0x02; // reset, FIFO 2
SYNCDELAY; //
FIFORESET = 0x04; // reset, FIFO 4
SYNCDELAY; //
FIFORESET = 0x06; // reset, FIFO 6
SYNCDELAY; //
FIFORESET = 0x08; // reset, FIFO 8
SYNCDELAY; //
FIFORESET = 0x00; // deactivate NAK-ALL
SYNCDELAY; //
EP2FIFOCFG = 0x08; // AUTOIN=1, WORDWIDE=0
SYNCDELAY; //
The follwing are based on slave fifo mode.I want to transfer the data to the EP0 ,then exchange the data between EP0 and EP6 under the vender command .I read the data from EP6, just as the bulk loop example,can everybody tell me weather the procedure wright or wrong ?Thanks
void TD_Init(void) // Called once at startup
{
// set the CPU clock to 48MHz
CPUCS =0x10;
// set the slave FIFO interface to 48MHz
IFCONFIG = 0xC0;
REVCTL = 0x03;
SYNCDELAY;
// Registers which require a synchronization delay, see section 15.14
// FIFORESET FIFOPINPOLAR
// INPKTEND OUTPKTEND
// EPxBCH:L REVCTL
// GPIFTCB3 GPIFTCB2
// GPIFTCB1 GPIFTCB0
// EPxFIFOPFH:L EPxAUTOINLENH:L
// EPxFIFOCFG EPxGPIFFLGSEL
// PINFLAGSxx EPxFIFOIRQ
// EPxFIFOIE GPIFIRQ
// GPIFIE GPIFADRH:L
// UDMACRCH:L EPxGPIFTRIG
// GPIFTRIG
// Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
// ...these have been replaced by GPIFTC[B3:B0] registers
// default: all endpoints have their VALID bit set
// default: TYPE1 = 1 and TYPE0 = 0 --> BULK
// default: EP2 and EP4 DIR bits are 0 (OUT direction)
// default: EP6 and EP8 DIR bits are 1 (IN direction)
// default: EP2, EP4, EP6, and EP8 are double buffered
// we are just using the default values, yes this is not necessary...
EP1OUTCFG &= 0x7F; //set invalid
EP1INCFG &= 0x7F;
SYNCDELAY; // see TRM section 15.14
EP2CFG = 0x7F; //set invalid
SYNCDELAY;
EP4CFG &= 0x7F; //set invalid.
SYNCDELAY;
EP6CFG = 0xE2; //set EP6 valid, in, bulk, 512, double buffer.
SYNCDELAY;
EP8CFG &= 0x7F;
SYNCDELAY; //set invalid.
FIFORESET = 0x80; // reset all FIFOs
SYNCDELAY;
//FIFORESET = 0x82;
// SYNCDELAY;
// FIFORESET = 0x84;
// SYNCDELAY;
FIFORESET = 0x02;
SYNCDELAY;
FIFORESET = 0x06;
SYNCDELAY;
FIFORESET = 0x00;
SYNCDELAY;
EP6FIFOCFG = 0x0D;//Autoin=1 Wordwide=1 Zerolength=1
SYNCDELAY;
EP6AUTOINLENH = 0x00;
SYNCDELAY;
EP6AUTOINLENL = 0x04;//just 4 bytes
// enable dual autopointer feature
AUTOPTRSETUP |= 0x01;
}
The following is Vender command
BOOL DR_VendorCmnd(void)
{
WORD i;
WORD count;
switch (SETUPDAT[1])
{
case VD_COMMAND:
if(!(EP0CS&0x02))
{ // check EP0 BUSY bit
if(!(EP2468STAT & bmEP6FULL))
{ // check EP6 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
APTR1H = MSB( &EP0BUF );
APTR1L = LSB( &EP0BUF );
AUTOPTRH2 = MSB( &EP6FIFOBUF );
AUTOPTRL2 = LSB( &EP6FIFOBUF );
count = (EP0BCH << 😎 + EP0BCL;
// loop EP0OUT buffer data to EP6OUT
for( i = 0x0000; i < count; i++ )
{
// setup to transfer EP0OUT buffer to EP6IN buffer using AUTOPOINTER(s)
EXTAUTODAT2 = EXTAUTODAT1;
}
EP6BCH = EP0BCH;
SYNCDELAY;
EP6BCL = EP0BCL; // arm EP6IN
SYNCDELAY;
EP0BCL = 0x80;
} // re(arm) EP0OUT
break;
}
default:
return(TRUE);
}
EP0CS|=bmHSNAK;
return(FALSE);
}
I just finished converting a working bulk design to use an isochronous endpoint and I think I may be misunderstanding what CCyIsoPktInfo.Length is trying to tell me. Here's what I am observing:
1) I fill my data buffer with a magic pattern before reading into it (host side--IN transfer).
2) I read data from the isochronous endpoint using beginDataXfer / WaitForXfer / FinishDataXfer. The endpoint is configured for 3 1K transfers per microframe.
3) All of the calls return success. The bus analyzer indicates that all of the data was transmitted. I iterate over the CCyIsoPktInfo structures to see how much of my data came through as expected. A cleaned up code snippet:
int packets;
CCyIsocEndPoint *ep = ... // this is my endpoint
CCyIsoPktInfo *pktInfos = ep->CreatePktInfos(l, packets);
memset(pktInfos, 0, sizeof(CCyIsoPktInfo) * packets);
ret = ep ->FinishDataXfer(buf, l, c->Overlapped(), c->m_ptr, pktInfos);
for(int i = 0; i < packets; i++)
{
if(pktInfos.Status != 0)
break;
len += pktInfos.Length;
}
delete [] pktInfos;
At this point, I expect "len" to contain the length of data successfully sent through up to the first dropped packet (if there are any). However, if I iterate over the first "len" bytes of the buffer, I find "holes" in the buffer where the original magic pattern still exists. The holes always begin and end on 1K boundaries.
I expected to see the CCyIsoPktInfo status return nonzero any time data wasn't copied into my buffer. Am I doing something obviously wrong with the SDK or should I look elsewhere in my code for the bug?
Thanks!
Hi,
I am looking for doc on the vendor specific commands (0x40) that work with alternate interfaces. I believe they are 0x33, 0x35 and 0x36.
Our firmware has some alternate interfaces defined to reserve bandwidth and I need to set them to simulate inadequate bandwidth to test our device's driver.
I have the EZ USB TRM, but I don't see a list of the commands and their calling packet?
Thanks
Show LessWe have used the 68013A 56pins in a design and are having problems to get it to work. I am now working on the CY6384 to try to understand how to use this circuit. Unfortunately the examples included in the documentation does not give much help. I find it hard to believe that looping data from one endpoint back to another endpoint inside the chip is a typical application for anyone.
Does anybody know of some examples that read og write data from endpoint to ports?
Our application is quite simple. We have two 16 bits ADCs multiplexed to port B and D. When output are ready from the ADC we read the port and put the data in the endpoint fifo. The plan was to used Endpoint 2 and 6, the configuration 9 in figure 1.17 in TRM. From the Users Guide this should be an easy task, the only thing we would need to do is to write the TD_Init and TD_Poll to initialize the ports and registers. In the TD_Poll we check the Output Ready from the ADC connected to RDY0, and read the port. Any examples doing something like this?
Best regards
Show LessCan CyConsole be used with WinUSB to talk to an FX2 device?
Hi,
I am working on Cy7C68013A-56pin cypress USB controller. I am not using a development board, instead made a custom design for my own application. Later, I read somewhere that 56-pin doesn't support debugging. Is that right. ? Is there any way that I can do any USB based debugging on Cy7C68013A-56pin cypress USB controller. ? Or, should I use a 100-pin Cy7C68013A cypress USB controller for debugging purpose ?
I am using uvision keil IDE.
Show LessHi,
I am working on Cypress usb high speed controller Cy7c68013A. I need to interface I2C lines with a I2C slave device (a cmos camera sensor). The example code for I2C read uses EZUSB_ReadI2C from EZUSB library.
My cmos camera slave address is 0x60 and the device ID is present in the sub address 0x1D. Here is the sequence I implemeted to read the device ID in a linux based system.
1. i2c_start()
2. i2c_write_byte(0x60)
3. i2c_ack()
4. i2c_write_byte(0x1D)
5. i2c_ack()
6. i2c_write_byte(0x61)
7. i2c_ack()
8. value = i2c_read_byte ()
The variable value gives the device ID. How can I implement this sequence with a EZUSB library ?
Thank You
Show LessHi,
I'm using this uC to control a RS232 port. I enabled the interrupt
and I can read a received payload of 3 bytes by a vendor command and an interrupt routine.
I have problem when I try to write because I suppose the interrupt routine is triggered, something goes wrong and the
uC won't answer. Could you help me?
How do I manage the writing operation skipping the interrupt?
This in the TD_Init:
CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ; //Setting up the clock frequency
SYNCDELAY;
T2CON = 0x34 ;
RCAP2H = 0xFF ;
RCAP2L = 0xD9;
SCON0 = 0x5A ;
Cont=0;
IE|= bmBIT4;
The interrupt routine:
#include "fx2.h"
#include "fx2regs.h"
#include "fx2sdly.h" // SYNCDELAY macro
extern BYTE Cont;
extern BYTE rbuf[10];
void IRS_USART0(void) interrupt 4
{
if (RI != 0)
{
RI = 0;
*(rbuf+Cont)=SBUF0;
Cont++;
if(Cont==3)
Cont=0;
}
else if(TI!=0)
TI=0;
}
while (TI == 0) ;
TI = 0 ;
SBUF0 = ch ;
break;
Show Less