USB low-full-high speed peripherals Forum Discussions

 I will try this out shortly, but want to know if support the the (USB2UART) chip in the subject line is supported in the standard USB "serial" devices yet.

Thanks, in advance,

Brendan

Has anyone used feedback endpoints on a FX2LP and can post an example.

Thanks

Jon

Hi

i have problem that it's seem like power.

When i working fx2lp board and fpga board.

So i connect with both board  for slave fifo working.

Fx2lp board is just connected USB cable( it's just use power from usb cable).

When i connect FPGA Board to Fx2lp board, FPGA Board's led is weak on.

it's seem like something wrong. but slave fifo is working well(stream project ).

I dont know what am i check ?

 I am using a FX2LP that sets endpoint 6 to IN. The data is coming from an FPGA connected to the FIFOs of the FX2LP. Is there a way to determine when the host sends an IN packet to request data. I want to know this as I am using a feedback endpoint and want to return the count when the host requests it.

Thanks

Jon

I am using a cy68013. How can I configure the controller to work in high speed mode?. I have read in the datasheet that,at the first negotiations between host and the device, hosta asks whether the device is capable of high speed data transfer. does it mean if the device says it is capable, host will transfer data in high speed mode?

Hello Cypress Developers Team,

I found a bug in the file i2c_rw.c which contains the I2C read and write functions used by the framework users.

The functions

BOOL EZUSB_ReadI2C(BYTE addr, BYTE length, BYTE xdata *dat)

BOOL EZUSB_WriteI2C(BYTE addr, BYTE length, BYTE xdata *dat)

return an "I2C status byte" defined in lp.h which looks like "I2C_OK".

However, the defined return value in the function is defined as BOOL thus the "I2C status byte" is cast to BOOL and loses its information. And worst of all EVERY return value of the functions casts to TRUE!

The return value could simply be defined as int or similar to keep the "I2C status byte" information.

I know I can fix the bug locally in my repository but the framework should be fixed too in my opinion.

Regards,

Robin

 I have a FX2LP design with a set of descriptors to create a USB audio device. The device implements a speaker, so I have a USB streaming input and a speaker output. The device is recognised by Windows as a USB audio device. However when I open media player and play an mp3 I dont get any data coming out of the FX2LP. I should mention that the FX2 is connected to an FPGA. I have a program monitoring the data coming into the FPGA, but nothing happens. Does anyone have any thoughts? I have attached the file if anyone can see any problems.

Thanks

Jon

HI,

        I am currently working on a project to get the video out of a camera using a FX2LP. I am trying to understand the FIFO read using GPIF. I have attached the FSYNC to RDY0 and LSYNC to RDY1. The hardware seems to work right as i able to receive the data out of the camera using a single read byte. I want to FIFO read waveform so that i can get the SYNC frame out of the camera and get the video out of the camera. But i still don't understand completely the transition from the timing diagrams to the state diagrams using GPIF. The following points, I am having confusion with:

1. In my project, FSYNC will rise at least one clock cycle before LSYNC. I want to make sure that FSYNC and LSYNC are both 0 before i activate the data. But if the decision state I can't use if FYSNC = 0 and LSYNC = 0 because the second data value is always 1. 

2. What should i use for the transaction counter? i am receiving 1 byte per pixel and it is 320 x 240 camera. Should i use the transaction counter to be 76800? I am confused that should I get frame in each FIFO read transaction. If yes, i want to use the AUTO IN mode, will the data be transferred automatically once the data buffer filled with 512 bytes?

I am attaching the timing diagram of the camera. Can you suggest any what would be the best way for me to get the video out of the camera.

I would really appreciate if someone can help me with this issue.

Regards,

ABM

Hi,

      I am using FX2LP developement kit. I am stuck when i try to external clock i can't do Bulk In Transfer. This is my project is:

I am trying to connect FX2LP with an external device (camera). The problem is that I want to use the clock of camera which is running at 5 MHZ so that i can synchronize my LSYNC(HSYNC) AND FSYNC(VSYNC) and grab a frame out of the camera. I implemented GPIF single read just to make sure that i able to receive any data from the camera. I used the GPIF example to data from the camera. Program runs fine and give me data if i use internal clock. But when i use external clock, my bulk in transfer fails in CyConsole. Could you please help me. That would be really appreciated.

Regards,

ABM