- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
We use CY7C68013 in a data capture card, CY7C68013 connect to a FPGA. When we use FPGA send a RESET# (active low about 5ms)signal, sometimes the software transfer failed. And we use USBTrace, Dectect SURPRISE REMOVAL. how can we fix it? Thank you!
The USBTrace detect as below.
Solved! Go to Solution.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Kindly provide details of your application;
>> Are you using the latest version 1.2.3.20 of the CyUSB3 driver?
>> OS version?
>> Is the issue seen in a single PC or multiple PCs?
>> Which firmware and data transfer interface are you using?
>> Which FPGA are you using?
Regards,
Mallika
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Kindly provide details of your application;
>> Are you using the latest version 1.2.3.20 of the CyUSB3 driver?
>> OS version?
>> Is the issue seen in a single PC or multiple PCs?
>> Which firmware and data transfer interface are you using?
>> Which FPGA are you using?
Regards,
Mallika
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Yes
Win7 64bits and win10 64bits and linux(use usblib to drve CY7C68013)
In multiple PC
FX2, and Bluk transfer, use slave fifo to FPGA
xilinx K7 325T
The usb device info is as follow:
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Are you using your registered VID and PID?
Which driver is the device bound to in Windows?
Please share screenshots of driver details.
Regards,
Mallika