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Hi All,
This thread is regarding SPI interface of CY7265211 (USB to SPI Bridge). As per the datasheet of this part (CY7C65211/CY7C65211-A, USB-Serial Single-Channel (UART/I2C/SPI) Bridge with CapSense® and BCD (cypre...), this part supports standard SPI interface with following pins:
SCLK, Chip Select, Data Out, Data IN
Please let me know if we can configure this part in Quad SPI master mode with following pins:
SCLK, Chip Select, IO0 (MOSI), IO1 (MISO) and two other GPIO lines configured as data lines (IO2 and IO3) to connect with SPI Config Flash. We are planning to use SPI Flash from Cypress/Infineon (Part Number: S25FL128SAGNFI001).
Please help in providing the information ASAP.
Thanks & Regards,
Sunny Watts
Solved! Go to Solution.
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Hi Sunny,
>> It won't be possible to use GPIO as data pins since GPIOs are driven one at a time from the host. To elaborate, it won't be possible for the data to go out from the gpio on a period interval based on the clock.
Instead, kindly refer to CY7C65215 which is a dual channel bridge.
Datasheet: https://www.cypress.com/file/129956/download
Regards,
Mallika
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Hi Sunny,
>> It won't be possible to use GPIO as data pins since GPIOs are driven one at a time from the host. To elaborate, it won't be possible for the data to go out from the gpio on a period interval based on the clock.
Instead, kindly refer to CY7C65215 which is a dual channel bridge.
Datasheet: https://www.cypress.com/file/129956/download
Regards,
Mallika