Current firmwar framework for FX2LP supports only upto 64kB EEPROM ((i.e. with 16 bit internal address). Whereas, if you modify the firware handling the I2C addressing, itseems possible. But anyhow, the internal RAM of FX2LP is only 16kB right? Even if you are using external RAM, it can only upto 64kB. I do not understand why you want 128kB EEPROM? If the case is like, the firmware that you will load inside 128kB EEPROM will be of smaller size (< = 64kB with external RAM, or else < = 16kB), then I think it might be possible. But I cannot assure you unless it is tested. Please create a tech support case at www.cypress.com so that one of engineers can test and understand the feasibility for the same.
In fact, I use CY7C68013A in my project, when I select C2-load mode, hardware boot loader copy only 16K bytes in E2prom(24L256)into internal 16K XRAM and CODE space(0x0000~0x3fff). if code size is less than 16K Bytes, it is ok. but my code size is bigger than 16K bytes, so I have to make my project into two hex file, the code size of 1st hex file is less than 16K bytes(0x0000~0x3fff), the 2nd hex file is located from0x4000~0xDFFF(40K bytes).
When the 1st code segment is loaded into internal 16K from I2C eeprom, FX2LP boots up and call TD_Init(), add my copy code:it will continue to read code data from eeprom and copy it into 0x4000~0xDFFF(movx inst).
Of course,I attached one 64K SRAM with FX2LP, SRAM RD <---> FX2LP OE(RD and PSEN),SRAM CS <--->FX2LP CS. EA = 0. So, one unified space(0x4000~0xDFFF,XDATA and CODE) is added.
I think this method can solve the bigger code code size case(>16K bytes) and can still work at C2 load mode.
As for bigger eeprom, more than 64K bytes, such like 24LC1024, I want to strore FPGA code in the same eeprom.
I want to know, hardware boot loader also call those three I2C function code(EEPROMWriteBytem,EEPROMWrite,EEPROMRead) in perpherial.c?