USB superspeed peripherals Forum Discussions
In my usb2.0 host firmware test, I found something weird.
These are some code snippets and the resulting logs.
static void
CyFxHostXferCb (uint8_t ep, CyU3PUsbHostEpStatus_t epStatus)
{
CyU3PReturnStatus_t status = CY_U3P_SUCCESS;
CyU3PDebugPrint (4, "CyFxHostXferCb ep=0x%x epStatus=0x%x\r\n",ep,epStatus);
/* Queue the next request */
if (ep != 0)
{
status = CyU3PUsbHostEpSetXfer (ep, CY_U3P_USB_HOST_EPXFER_NORMAL, 0);
CyU3PDebugPrint (4, "CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x%x\r\n",status);
}
}
/* This function initializes the USB host stack. */
void
CyFxUsbHostStart ()
{
CyU3PUsbHostConfig_t hostCfg;
CyU3PReturnStatus_t status;
hostCfg.ep0LowLevelControl = CyFalse;
hostCfg.eventCb = CyFxHostEventCb;
hostCfg.xferCb = CyFxHostXferCb;
status = CyU3PUsbHostStart (&hostCfg);
if (status != CY_U3P_SUCCESS)
{
return;
}
}
...
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x40
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x40
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x40
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x40
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x40
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x141
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x141
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x141
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x141
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x141
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x141
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x141
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x141
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
CyFxHostXferCb ep=0x81 epStatus=0x40
CyFxHostXferCb CyU3PUsbHostEpSetXfer(0) status=0x0
...
According to the following table, the last 4digits(3:0) indicate ep number.
When we look at the logs,
as we know, ep=0x81 means EP_NUM=1
CyFxHostXferCb ep=0x81 epStatus=0x141 -> This makes sense because, EP_NUM of epStatus is "1"
But in the following case,
CyFxHostXferCb ep=0x81 epStatus=0x40 -> epStatus tells EP_NUM is "0" instead of "1", which does not match with ep=0x81.
How should I interpret this discrepancy?
Regards,
Rossi
Show LessOur application sends Alt DP video over a USB-C interface. We are trying to use an FX3 processor to be the USB host and enumerate a COTS display driver card (attached via USB-C). Our board schematic is a mashup of parts of the FX3 eval board schematic, parts of the CCG3 eval board schematic, and the rest is our own custom design. We are also using a Microblaze soft CPU core running on our FPGA to control some of the signals going to the FX3 (including PMODE and RESET).
The problem I am having is that I am unable to get the OpenOCD debugger working on our board even though it works on the FX3 eval board (OpenOCD is kicked off while running the Cypress EZ USB Suite). To remove the possibility of the problem being with my custom FX3 code I am using the Fx3TestProjBulk example project. When I run the debugger on the FX3 eval board, the code is successfully downloaded to FX3 RAM and I can step through the code. However, when I use the same project on our custom board nothing is downloaded to FX3 RAM. I'm now sending debug output to a log file, and comparing the log files from the sessions with both boards one of the first things I've noticed is that on the FX3 eval board the processor is entering Supervisor mode every time, but on the custom board it enters IRQ mode, then System mode. I've also noticed that MMU is enabled on the FX3 eval board but it is disabled on the custom board. I have compared the schematics around the FX3 on the eval board and the custom board but haven't really seen anything that I think would make a difference, but it's possible some of the pins that are set through our FPGA are being set differently.
Do you have any idea what could make my custom board not put the FX3 in Supervisor mode and/or not enable the MMU?
Show Less
I've been trying to set up a two-stage bootloader for an FX3 device using the example code "Fx3BootAppGcc", but for the life of me I can't figure out how I'm meant to compile or store the main application so that the bootloader can load it. So far, I have the following questions:
- Can multiple .img files be loaded onto the same EEPROM, or would they need to be consolidated into a single image?
- If multiple .img files cannot coexist on the same EEPROM, is it possible to output a compiled binary in a different file format that is able to be added in parallel to other files?
- Are there any changes I should make to the toolchain in order to generate applications capable of being loaded by a second-stage bootloader?
- Should I change the initialization of the application loaded by the bootloader? (i.e. not call CyFx3BootDeviceInit() if the bootloader already called it)
- Is FX3 capable of using position independent code?
- Can an application which uses the boot_fw API be loaded from a second-stage bootloader, or is a ThreadX-enabled application necessary?
Hi team,
After flashing firmware in SPI flash through control center, how to make Cx3 auto reset to re-enumerate as UVC device without unplugging the device. Any clue?
I am following Cypress Control center logic to update my device firmware. After updating firmware I wanted to make my device re-enumerate as UVC device without unplugging the device. Can you help me with an idea?
Thank you,
Shafi.
Show Less
Hi all,
In my test thread when I call a function which contains CyU3PDmaChannelSetupRecvBuffer , the thread is not working after the function calling. (logs are attached in the below)
When I call EmptyRecvBuffer, thread is working fine. but when I call RecvBuffer, the RecvBuffer run only once, and then the thread is not running anymore.
void
UvcRecvThread(
uint32_t Value)
{
uint8_t buffer[1024];
CyU3PReturnStatus_t status;
CyU3PDebugPrint(4,"UvcRecvThread starts (DMA Channel size=%d)\r\n",glHostUvcCh.size);
while(1)
{
CyU3PDebugPrint (4,"RecvBuffer...\r\n");
//status = EmptyRecvBuffer(glHostUvcEp,&glHostUvcCh,buffer,1024);
status = RecvBuffer(glHostUvcEp,&glHostUvcCh,buffer,1024);
CyU3PDebugPrint (4,"RecvBuffer status=0x%x\r\n",status);
}
}
CyU3PReturnStatus_t
RecvBuffer (
uint8_t inpEp,
CyU3PDmaChannel *inpCh,
uint8_t *buffer,
uint16_t count)
{
CyU3PUsbHostEpStatus_t epStatus;
CyU3PReturnStatus_t status = CY_U3P_SUCCESS;
uint32_t prodXferCount = 0;
uint32_t consXferCount = 0;
CyU3PDmaState_t state = 0;
CyU3PDmaBuffer_t buf_p;
/* Setup the DMA for transfer. */
buf_p.buffer = buffer;
buf_p.count = 0;
buf_p.size = ((count + 0x0F) & ~0x0F);
buf_p.status = 0;
CyU3PDebugPrint(4,"CyU3PDmaChannelSetupRecvBuffer...\r\n");
status = CyU3PDmaChannelSetupRecvBuffer (inpCh, &buf_p);
CyU3PDebugPrint(4,"CyU3PDmaChannelSetupRecvBuffer status=0x%x,size=%d\r\n",status,buf_p.size);
CyU3PDebugPrint (4,"RecvBuffer return status=0x%x\r\n",status);
return status;
}
CyU3PReturnStatus_t
EmptyRecvBuffer (
uint8_t inpEp,
CyU3PDmaChannel *inpCh,
uint8_t *buffer,
uint16_t count)
{
CyU3PThreadSleep(10);
return CY_U3P_SUCCESS;
}
UART log for the above (no more logs after the last line)
UvcRecvThread starts (DMA Channel size=1024)
RecvBuffer...
CyU3PDmaChannelSetupRecvBuffer...
CyU3PDmaChannelSetupRecvBuffer status=0x0,size=1024
RecvBuffer return status=0x0
I have no idea how to interpret this result.
Show LessHi,
I am strange behaviour with some of my address lines of my GPIF2 interface.
My GPIF interface definition is:
Asynchronous Master, 16 bit data bus width, 16 address pins, 3 additional Outputs for RD, WR and CS controlled by the state machine. I2C and SPI peripherals are also used and selected.
The address lines are shown as GPIO[33:44] and GPIO[46:49].
Now the uppermost 4 address lines are not working as intended. Instead of taking the value I set with the CY_U3P_PIB_GPIF_EGRESS_ADDRESS macro those values never change and immediately after loading the firmware are set to 1010. The lower bits seem to be working properly.
Is there a compatibility issue that the GPIF II Designer is not showing?
I found a solution for now by controlling those four address bits manually after claiming them using the CyU3PDeviceGpioOverride() command but I would prefer to not do that.
Best regards
Raschid
Show LessWe think that FX3 SDK is included a lot of function, API, RTOS, and sample firmware, but we do not know whether these files are open source or not..
Show LessHello,
I have a problem when I use GPIF in 32bit syncslave mode, my device is CYUSB3014. And my GPIF setting is refering to AN65974 :
1) the FlagA is the thread_0_DMA_ready, the FlagB is the thread_0_DMA_watermark.
2) the FlagC is the thread_3_DMA_ready, the FlagD is the thread_3_DMA_watermark.
At the First,I send partial package to the FPGA and the FPGA get the right data form GPIF, and then send the data back, but the Flags of thread 0 is not work well, what does the FlagA is low and the FlagB is high means? The FlagA and FlagB will always be low,never back to high if I send a full packages(1024 bytes , the same with the DMA buffer size), and I get a CYU3P_GPIF_ERR_INVALID_STATE error when I call "CyU3PPibRegisterCallback", why is this happened ? How could I fix it?
In the FX3 firmware ,I use the both GPIF and I2C, and I have a setting is "io_cfg.gpioSimpleEn[1] = 0x007C2000;" , is my question affected by these settings? But once I change to GPIF 16bit mode , the FlagA/B is work well ,and I can recvive the data loopback.
Show Less
Hello,
I plan to use the FX3 to interface to an ASIC over GPIF and to another USB MSD over USB port. However, according to the device specs, the USB function in the FX3 is fixed to "peripheral". IS there any way to use the USB in the FX3 devices in host mode so you can connect MSD peripherals?
Thanks
Show Less