USB superspeed peripherals Forum Discussions
Hi there,
I am trying to connect that combination onto the FMC1 port on my ZC702 board.
Do I need to take care of the voltage levels etc? For example DIP switches?
Show Less// Step 1 CyU3PPibInit(... CyU3PSetEpConfig(... // with epCfg.enable = CyTrue CyU3PUsbFlushEp(... CyU3PUsbResetEp(... //seems to be obsolete CyU3PDmaChannelCreate(... CyU3PGpifLoad(... CyU3PGpifSMStart(... CyU3PGpifSocketConfigure(1, ... // this works after I found out that PIB_SOCKET_1 must be connected to GPIF thread 1 // but PIB_SOCKET_4.. can be connected to any thread ... // reset CyU3PGpifDisable(CyTrue); CyU3PUsbFlushEp(... // also tried CyU3PDmaChannelReset here, but this should be obbsolete CyU3PDmaChannelDestroy(... CyU3PSetEpConfig(... // with epCfg.enable = CyFalse CyU3PPibDeInit(... // Step 2 CyU3PPibInit(... // diferent clock settings CyU3PSetEpConfig(... // same as in step 1 CyU3PUsbFlushEp(... CyU3PUsbResetEp(... // seems to be obsolete CyU3PDmaChannelCreate(... // same as in step 1 CyU3PGpifLoad(... // different waveform CyU3PGpifSMStart(... CyU3PGpifSocketConfigure(1, ... // this works in USB 2.0 mode and only rarely in USB 3.0 mode // whether it works in super speed mode seems to depend on how much data // are sent in step 1
SDK version is 1.3.3 Is there something I'm missing?
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How to get the Slave FIFO PIN map from CYUSB3KIT-003 ?
I'd like to test by using slave fifo mode with my FPGA board on CYUSB3KIT-003.
I've already check from here http://www.cypress.com/file/136056/download?
It does not present anything about port map for slave fifo mode of my CYUSB3KIT-003 board.
How do I figure out the pin map for slave fifo mode on CYUSB3KIT-003 board?
I want to know where SLCS#(in Slave FIFO mode) pin is mapping on the CYUSBKIT-003 board, also the other pins(in Slave FIFO mode), also too.
Hello ,
In my project the FPGA should send data to the FX3 through all for threads in GPIF-II module.
In order to configure this, I have been adding DMA channels one by one.
I attached the code.
As you can see I am creating two DMA channels.
One channel takes data from CY_U3P_PIB_SOCKET_0 (thread 0) and puts data to 0x82 endpoint (CY_U3P_UIB_SOCKET_CONS_2).
Next channel takes data from CY_U3P_PIB_SOCKET_1(thread 1) and puts data to 0x83 endpoint (CY_U3P_UIB_SOCKET_CONS_3).
The issue is whatever the channel that I create second fails with the return code 64(CY_U3P_ERROR_BAD_ARGUMENT).
I would like to know what is the invalid argument in above setting.
Thank you.
Show LessHello,
We are using the CX-3 together with a custom built image sensor. The implementation is UVC device. The problem is, when the imager is configured and starts streaming , the first frame from the stream is lost. All data after the firs frame is received properly. I can also see that the first frame is received on the CSI and is recognized and sent over the GPIF. Then it is lost.
It does not seem to be buffer related issue, as varying the frame size always shows the same problem - only the first one is lost, irrelevant of the frame size. It looks like vsync synchronized.
Any ideas what could be leading to such behaviour?
Show LessThe project (Cx3UvcOV5640) uses the fixed function GPIF. The code is shown below: CyU3PMipicsiGpifLoad(CY_U3P_MIPICSI_BUS_16, ES_UVC_DATA_BUF_SIZE);
However, we want to add some logic control, and need to change the GPIF II state machine. Could you provide the GPIF II project source files?
Look forward to your reply, thank you very much!
Show LessI have Cypress cyusb3.sys source code now and the code includes some script files such as cybuildall.bat, cywdkbuild.bat and MAKE_INX.exe.txt.But the cyusb3.sys source code only supports Windows 7 x64 and earlier version. I want to know how it supports Windows 8.1 even higher system version? Should i modify the code or change the way the compiler? Thank you very much!
Show LessBased on the introduction <How to Implement an Image Sensor Interface Using EZ-USB® FX3™ in a USB Video Class (UVC) Framework >,
it streams images on Linux. But it has a black screen on Windows. We can capture endpoint data from usb bushound tool, but still no image.
Show LessHello,
we developed two different board with cypress FX3. We found a very strange issue: the communication with the FX3 is reliable only if we use a usb3 hub and we do not connect the chip directly to the motherboard controller.
We implemented both master and slave GPII interface and we connect it to a Kintex 7 FPGA. Now we are working with master interface. The problem happens only if we read from FX3 large amount of data (more then 256 kbytes) and when we start the transfer (PC side) when the datavalid is low. It means that if we are using the GPII as master the FPGA has the FX3empty flag high.
Without usb hub on some computers the FX3 stops to transfer data after about 64 kbyte (something more, is not exaclty 64kbyte). No more read request signals comes from the FX3 even if the FX3empty signal is low. If I use a usb3 hub everythings works as expected and I can't experience any problem trasfering data.
If i keep the datavalid high and i transfer data as soon as the FX3 request that everythings work correctly even without usb3 hub
The problem appears both on Master and Slave interface.
What can i do?
Thanks
Andrea
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