USB superspeed peripherals Forum Discussions
I am using the EZ-USB FX3 development board. I want to download firmware image to I2C EEPROM, but ,it always show Promgramming of I2C EEPROM Failed.
the EEPROM is 24LC1025.(I tested it with UsbI2CDmaMode,the chip works well )
SW25=off,off,on,on.
SW40=on,on,off,off.
J42 and J45 pins 1-2 are shorted on the DVK board.
And,the size of img is less than 128KB. ie USBBulkLoopAuto.img=121KB
Hi:
I want to configure a FPGA of altera , AN84868 is referenced. but i want use the quartus II software to download FPGA code and debug.
so i think i need the altera usb blaster driver ,but how can i make match AN84868 and the altera usb blaster driver ,where that i need modify. do you see what i mean ? do you have other better ways .can you help me , thanks.
Show LessHi,
Has anyone ever created an SDK project that I can use to print data read with FX3 into a txt file? - I would like to use the STREAM_IN feature of the device.
Thanks in advance
Best regards
Alessandro
Show LessHi all,
I have observed that the FX3 driver installed with SDK is not completely having the driver for "Cypress USB BootLoader" the default bootloader running with FX3 with VendorID="04B4" and ProductID="00BC" . I have opened the driver "cyusb.inf" file present inside the driver folder of FX3 SDK installation location, I did see that the PID of Bootloader is mapped to "00F3". If this value is "BC" instead of "F3", device is detected properly. So, Please let me know if there is cypress signed driver with BootLoader assigned to "00BC" or any other suggesstions for solving this issue is also welcome.
Thanks,
KCNGP
Show LessHello.
I try to organize Slave FIFO Interface with CYUSB3KIT-003, CYUSB3ACC-006 HSMC Interconnect Board and Altera Cyclone III Starter Board as described in AN65974.
I've compared pinout of CYUSB3ACC-006 with Altera's Starter Board pinout -- and it doesn't match. Some signals from CYUSB3KIT-003, which is needed for Slave FIFO Interface, don't reach FPGA. For example, signal FLAGA. In GPIF II Interface it is CTL[4] (picture 1). CTL[4] on CYUSB3ACC-006 HSMC Interconnect Board attach to pin №100 (picture 2). But on Altera's Starter Board pin №100 connects to 12V and doesn't reach FPGA (picture 3).
So, I don't understand, how Slave FIFO Interface can work? Maybe I miss something.
Look forward to hearing from you. Thanks.
Pic 1 from "CYUSB3014 EZ USB FX3 datasheet", page 32.
Pic 2 from "630-60197-01_CYUSB3ACC-006_HSMC_INTERCONNECT_BOARD_SCHEMATIC", page 3.
Pic 3 from "cycloneiii_sb_3c25", page 11.
Hi,
Does there is an up-to-date list of SPI Flash compatible for booting with the FX3. The one given in AN76405 is quite short.
I am after a replacement for my N25Q016 but I have trouble identifying a 1.8V SPI Flash that will work with the FX3 and which is easy to source (Farnell, Digikey, Mouser...).
The W25Q16 from Windbond seems to fit the bill but I would like confirmation. I might buy one and try to drop it into one of the FX3 design I have...
Regards.
Etienne
Show Lesshi when i try to debug use jtag to debug cyusb3014 it occur "error while launching command:gdb --version"
attached file is my configuration, the last one is error window and informations of open gdb server manually
Show LessHello
i am designing a device that will transfer data over FX3. I have implemented a slavefifo with 2 bit address, 32 bit data and 4 flags. FLAGA is a RDY dedicated flag for address 00 and FLAGB is watermark flag for address 00. FLAGC is a RDY dedicated flag for address 11 and FLAGD is watermark flag for address 11.
My slavefifo FX3 firmware is designed with AUTO commit On endpoint 00 i transfer data P-to-U and on endpoint 11 i transfred data U-to-P.
My problem is that i can transfer data from my host to device (U-to-P). In this case i see that flagc and flagd are responding completely correct. However when i send data from device to host my applications times out. Further more i see that in this case flagA and flagB are constantly high. I tried sending a short packet by asserting pktend and even in this case flagA and flagb are kept high.
Please can you tell me why i have this behavior?
I have attached my GIPF interface and source code.
thank you
Show LessWe are using the CX3 controller with Sony CMOS imaging chips, but have issues with system crashes when activity takes place on the host PC. I suspect that the problem is caused by using bulk transfers with a device that feeds continuous high speed data (an image stream) - any hesitation in the flow will cause the image data to back up and crash the link. Because of this, we are considering the use of isochronous transfers, but the data rate appears to be lower than with bulk. Is this the case, or is it possible to get maximum bandwidth in iso mode?
Any info. or suggested solutions are welcome!
Thanks!
Terry
Show Less