USB superspeed peripherals Forum Discussions
I have sample code for testing the camera streaming from the fx3 when connecting the camera, I have to perform the interrupt transfer by the side when the camera starts streaming,
I have an fx3 board and camera connected, I have used the libuvc and libusb libraries with opencv, I have used in the code to do,
#include <stdio.h>
#include <opencv/highgui.h>
#include <opencv2/core.hpp>
#include <opencv2/opencv.hpp>
#include "libuvc/libuvc.h"
#include "libuvc/libuvc_internal.h"
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <iostream>
#include <opencv2/imgproc.hpp>
#include <opencv2/imgcodecs.hpp>
#include <opencv2/videoio.hpp>
#include <opencv2/opencv.hpp>
#include <thread>
using namespace std;
using namespace cv;
void cb(uvc_frame_t *frame, void *ptr) {
uvc_frame_t *bgr;
uvc_error_t ret;
IplImage* cvImg;
int wid = frame->width;
int hei = frame->height;
unsigned short data16[wid*hei];
unsigned char * bytedata = (unsigned char*) frame->data;
for(int ii=0; ii < wid*hei; ii++) {
data16[ii] = (unsigned short) (bytedata[2*ii]) | (unsigned short) (bytedata[2*ii+1] << :sunglasses: ;
}
cv::Mat Bayer( hei, wid, CV_16UC1, (void*) data16);
double min, max;
cv::minMaxLoc(Bayer, &min, &max);
cv::Mat bgrmat(wid,hei,CV_16UC3);
cv::cvtColor(Bayer, bgrmat, CV_BayerBG2RGB);
cv::pyrDown(bgrmat,bgrmat);
cv::pyrUp(bgrmat,bgrmat);
bgrmat.convertTo(bgrmat,CV_8UC3);
Bayer.convertTo(Bayer,CV_8UC3);
#if 0
#endif
cv::namedWindow("Test", CV_WINDOW_AUTOSIZE);
cv::imshow("Test", bgrmat);
cv::waitKey(1);
}
void task1() {
struct libusb_device_handle *usb_devh;
uvc_device_handle_t *internal_devh;
struct libusb_device_descriptor desc;
uvc_device_t *dev;
int result;
int recv;
unsigned char data_in[4];
result = libusb_open(dev->usb_dev, &usb_devh);
fprintf(stderr, " result %d\n", result);
}
int main(int argc, char **argv) {
uvc_context_t *ctx;
uvc_error_t res;
uvc_device_t *dev;
uvc_device_handle_t *devh;
uvc_stream_ctrl_t ctrl;
struct libusb_device_handle *usb_devh;
struct libusb_device_descriptor desc;
res = uvc_init(&ctx, NULL);
if (res < 0) {
uvc_perror(res, "uvc_init");
return res;
}
puts("UVC initialized");
res = uvc_find_device(
ctx, &dev,
0, 0, NULL);
if (res < 0) {
uvc_perror(res, "uvc_find_device");
} else {
puts("Device found");
res = uvc_open(dev, &devh);
if (res < 0) {
uvc_perror(res, "uvc_open");
} else {
puts("Device opened");
uvc_print_diag(devh, stderr);
res = uvc_get_stream_ctrl_format_size(
devh, &ctrl, UVC_FRAME_FORMAT_YUYV, 400, 400, 30);
uvc_print_stream_ctrl(&ctrl, stderr);
if (res < 0) {
uvc_perror(res, "get_mode");
} else {
int dummy;
int result;
res = uvc_start_streaming(devh, &ctrl, cb,&dummy, 0);
if (res < 0) {
uvc_perror(res, "start_streaming");
} else {
puts("Streaming for 10 seconds...");
uvc_error_t resAEMODE = uvc_set_ae_mode(devh, 1);
uvc_perror(resAEMODE, "set_ae_mode");
int i;
unsigned char data_in[4];
int recv;
while(1){
result = libusb_interrupt_transfer(devh->usb_devh, 0x82, data_in, 4, &recv, 1000);
printf("%d",result);
for(int i = 0; i < recv; i++)
{
printf("%02x ",data_in[i]);
}
printf("\n");
}
sleep(1);
// }
sleep(200);
uvc_stop_streaming(devh);
puts("Done streaming.");
}
}
uvc_close(devh);
puts("Device closed");
}
uvc_unref_device(dev);
}
uvc_exit(ctx);
puts("UVC exited");
return 0;
}
I have tested the interrupt transfer and camera streaming separately, which is working fine.
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Dear Sir,
Because CB failure occurs frequently in my CX3 board, I add the following code after CB failure, I want to know whether mipi-error cause this CB failure.
The errCnts is
257,(0x101)
or
,1
or
514(0x202)
or
258(0x102)
when CB failure occurs.
Can anyone explain what's the meaning for errCnts?
David
//read cx3 internal csi2 error status register
uint32_t errCnts=0;
static uint32_t i = 0;
CyU3PMipicsiGetErrors( CyTrue, &errCnts);
CyU3PDebugPrint (4,"\n\rCyCx3UvcAppThread_Entry:CyU3PMipicsiGetErrors %d,i=%d", errCnts,i);
i++;
Show LessHi,
I configured the I2S with following properties
/* Configure the I2S interface. */
CyU3PMemSet ((uint8_t *)&i2sCfg, 0, sizeof (i2sCfg));
i2sCfg.isMono = CyTrue;
i2sCfg.isLsbFirst = CyFalse;
i2sCfg.isDma = CyTrue;
#if 1
i2sCfg.padMode = CY_U3P_I2S_PAD_MODE_NORMAL;
#else
i2sCfg.padMode = CY_U3P_I2S_PAD_MODE_CONTINUOUS;
#endif
i2sCfg.sampleRate = CY_U3P_I2S_SAMPLE_RATE_44_1KHz;
i2sCfg.sampleWidth = CY_U3P_I2S_WIDTH_16_BIT;
status = CyU3PI2sSetConfig (&i2sCfg, NULL);
If padMode is CY_U3P_I2S_PAD_MODE_NORMAL , even though I set sampling rate as 44100 Hz, the WCLK comes as 44365Hz and MCLK as 11.3578MHz.
Similarly, if padMode is CY_U3P_I2S_PAD_MODE_CONTINUOUS, even though I set sampling rate as 44100 Hz, the WCLK will be 44056Hz and MCLK as 5.63920 MHz.
Why the WCLK is not coming precise 44100 Hz in either case? Does a change in the WCLK cause noise in the audio output? I am currently hearing periodic click noise in
CY_U3P_I2S_PAD_MODE_CONTINUOUS and hissing noise in CY_U3P_I2S_PAD_MODE_NORMAL.
I have read the I2s MCLK shall be 11.2896MHz to get 44100 Hz as sampling frequency (WCLK) as MCLK = 256x WCLK.
Show LessHi,
I have got following code snippet for initialising I2S with DMA from http://www.cypress.com/file/134661/download page no 196.
/* Configure the I2S interface. */
CyU3PMemSet ((uint8_t *)&i2sCfg, 0, sizeof (i2sCfg));
i2sCfg.isMono = CyFalse;
i2sCfg.isLsbFirst = CyFalse;
i2sCfg.isDma = CyTrue;
i2sCfg.padMode = CY_U3P_I2S_PAD_MODE_NORMAL;
i2sCfg.sampleRate = CY_U3P_I2S_SAMPLE_RATE_44_1KHz;
i2sCfg.sampleWidth = CY_U3P_I2S_WIDTH_16_BIT;
status = CyU3PI2sSetConfig (&i2sCfg, NULL);
It is mentioned that if the pad mode is NORMAL, then in the 32 bit sample data, its LSB shall be padded with zeroes.
In the above example code, it configures the I2S as PAD MODE NORMAL and sample width is 16 bit. The DMA it creates is auto DMA (Page no 196, sec 8.8.4.13). If its auto DMA mode, how does the zeroes get padded to the sample data?
2) Can buffer underrun occur for Auto DMA? If it occurs, can you please give me example code which handles the buffer underrun for I2S Auto DMA?
Show LessHi,
I want the I2S MCLK to be given externally to CX3 instead CX3 generates it out. How shall I accomplish this?
Why I Need this?
------------------------
The MCLK generated out of CX3 is 11.3578MHz instead of 11.2896MHz. This makes I2S WCLK as 44.365KHz instead of 44.1 KHz which eventually causes some audio noise issues in my device. Thus, I thought of giving an external 11.2896MHz clock to MCLK of CX3.
Show LessHi all,
I have tested ESD (Electro-static Discharge) test.
To prevent CYUSB304 stopping, I need reset code or watchdog timer code.
So, I want to know how to add code below two cases.
1) case 1: RESET
In CyFxAppErrorHandler() function,
may I add CYU3PDeviceReset(0) function? or CYU3PDeviceReset(1)?
2) case 2: WATCHDOG TIMER
I checked CyFx3BootWatchdogConfigure() and CyFx3BootWatchdogClear() function.
I don't know where these functions locate and how to use these functions.
Please response my questions.
Regard, thank you.
Kim
Hi,
I found an example of UART RX/TX in firmware example - cyfxuartlpregmode
I can successfully build the application. But when I run it, I see no receiver output via UART. I am using hyperterminal and I have the same settings as in code. From what I understand, it should transmit back the same bytes I send. But I receive nothing.
Can someone help me fix this issue.
Thanks.
Show LessHi,
I'm starting to discover the FX3 programation and I have encountered some problems.
I want to program a frame grabber that will get the input of my omnivision camera and send it via usb 3.0.
I use the AN75779 to guide me through this, even if I know this is an outdated document (SDK 1.1).
I use the 1.2 firmware called cyfxuvcinmem.
When loading this project, I had quite a number of errors.
- uint8_t and such not recognized
-NULL not recognized
- Bad input for some #include
I think that I fixed those.
Yet I still have some problems
- A lot of constants are not known
in cyu3uart.c:
CyU3PMutexCreate (&glUartLock, CYU3P_NO_INHERIT);
in cyfxuvcinmem.c:
status = CyU3PDmaChannelGetBuffer (&glChHandleUVCStream, &dmaBuffer, CYU3P_WAIT_FOREVER);
CYU3P_NO_TIME_SLICE, /* No time slice for the application thread */
CYU3P_AUTO_START /* Start the Thread immediately */
in cyfxtx.c:
CyU3PDmaBufMgr_t glBufferManager = {{0}, 0, 0, 0, 0, 0};
status = CyU3PByteAlloc (&glMemBytePool, (void **)&ret_p, size, CYU3P_NO_WAIT);
Have I forgotten an include or something? Thanks for the help
Vincent
Show LessHi, all!
I'm trying to implement FX3 SLFIFO app with FPGA Firmware loading, based on ConfigFpgaSlaveFifoSync example. As in the example, the FX3 works in cycle-switching between SLFIFO App and ConfigFPGA App. The problem is, I can do FPGA Firmware loading only once. The next one just doesn't do the DMA transfer between USB endpoint and GPIF.
I have zeroed in on the problem by effectively removing the SLFIFO App and just repeating the reinitialization and termination of ConfigApp. It looks, that the source of the problem is disabling the USB Endpoint on termination of ConfigFPGA App(CyU3PSetEpConfig) and than reeanabling it on restart. If, after first time initialization of EP I leave it active, I can do multiple FPGA reconfiguration. All other resources (DMA Channel, GPIF State machine, GPIF Socket) are being released and reinitiated without problem.
Do you have an idea, what can be the cause of the problem?
Below are crucial functions forming the reintialization - termination cycle. 'fcattempt' is 0 at FX3 firmware init and changes to 1 after first successful FPGA firmware load. Without 'if (!fcattempt)' condition the repeated FPGA FW loading fails. I have removed all the status checks, to make code citation shorter.
Show Lessvoid startConfigFpgaApp(void)
{
uint16_t size = 0;
CyU3PEpConfig_t epCfg;
CyU3PDmaChannelConfig_t dmaCfg;
CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS;
uint8_t burstLength =0;
initConfigFpgaApp(); //effectively calling gpifConfigure function (included below)
apiRetStatus = usbTransferParams(&size, &burstLength);
CyU3PMemSet ((uint8_t *)&epCfg, 0, sizeof (epCfg));
epCfg.enable = CyTrue;
epCfg.epType = CY_U3P_USB_EP_BULK;
epCfg.burstLen = burstLength;
epCfg.streams = 0;
epCfg.pcktSize = size;
if (!fcattempt) //without that condition here and int stopConfigFpgaApp, the repeated loading fails
{
apiRetStatus = CyU3PSetEpConfig(CY_FX_EP_PRODUCER, &epCfg);
}
apiRetStatus = CyU3PUsbSetEpSeqNum(CY_FX_EP_PRODUCER, seqnum_slfifo);
dmaCfg.size = size * BURST_LEN;
dmaCfg.count = DMA_BUFFER_COUNT;
dmaCfg.prodSckId = FPGA_CONFIG_PRODUCER_SOCKET;
dmaCfg.consSckId = FPGA_CONFIG_CONSUMER_SOCKET;
dmaCfg.dmaMode = CY_U3P_DMA_MODE_BYTE;
dmaCfg.notification = CY_U3P_DMA_CB_PROD_EVENT;
dmaCfg.cb = FpgaUtoPDmaCallback;
dmaCfg.prodHeader = 0;
dmaCfg.prodFooter = 0;
dmaCfg.consHeader = 0;
dmaCfg.prodAvailCount = 0;
apiRetStatus = CyU3PDmaChannelCreate (&dmahndFpgaLoadUSB2CPU,CY_U3P_DMA_TYPE_MANUAL, &dmaCfg);
CyU3PUsbFlushEp(CY_FX_EP_PRODUCER);
apiRetStatus = CyU3PDmaChannelSetXfer(&dmahndFpgaLoadUSB2CPU, 0);
glIsApplicationActive = CyTrue;
}
void stopConfigFpgaApp(void)
{
CyU3PEpConfig_t epCfg;
CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS;
glIsApplicationActive = CyFalse;
CyU3PUsbGetEpSeqNum(CY_FX_EP_PRODUCER, &seqnum_slfifo);
apiRetStatus = CyU3PUsbFlushEp(CY_FX_EP_PRODUCER);
apiRetStatus = CyU3PDmaChannelReset(&dmahndFpgaLoadUSB2CPU);
apiRetStatus = CyU3PDmaChannelDestroy (&dmahndFpgaLoadUSB2CPU);
if (!fcattempt)
{
CyU3PMemSet ((uint8_t *)&epCfg, 0, sizeof (epCfg));
epCfg.enable = CyFalse;
apiRetStatus = CyU3PSetEpConfig(CY_FX_EP_PRODUCER, &epCfg);
}
}
void initConfigFpgaApp(void)
{
CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS;
apiRetStatus = gpifConfigure(GPIF_CONFIG_FPGA_FW_LOAD);
}
CyU3PReturnStatus_t gpifConfigure(Fx3_Gpif_Config Gpif_Config)
{
CyU3PReturnStatus_t status;
CyU3PPibClock_t pibClock;
const CyU3PGpifConfig_t *gpif_config;
uint8_t gpif_state_index;
uint8_t gpif_initial_alpha;
static CyBool_t gpif_active = CyFalse;
static CyBool_t pib_active = CyFalse;
if (gpif_active)
{
CyU3PGpifDisable(CyTrue);
gpif_active = CyFalse;
}
if (pib_active)
{
status = CyU3PPibDeInit();
pib_active = CyFalse;
}
switch (Gpif_Config) {
case GPIF_CONFIG_SLFIFO:
//... irrelevant
break;
case GPIF_CONFIG_FPGA_FW_LOAD:
gpif_config = &loadFPGAGpifConfig;
gpif_state_index = FPGA_FW_LOAD_START;
gpif_initial_alpha = FPGA_FW_LOAD_ALPHA_START;
Dbg (4, "GPIF = FPGA Fw Load\n");
break;
case GPIF_CONFIG_DISABLED:
return CY_U3P_SUCCESS;
default:
return CY_U3P_ERROR_BAD_ARGUMENT;
}
pibClock.clkDiv = 2;
pibClock.clkSrc = CY_U3P_SYS_CLK;
pibClock.isHalfDiv = CyFalse;
pibClock.isDllEnable = CyFalse;
status = CyU3PPibInit(CyTrue, &pibClock);
pib_active = CyTrue;
status = CyU3PGpifLoad(gpif_config);
if(Gpif_Config == GPIF_CONFIG_SLFIFO)
{
// ... irrelevant
}
else
if(Gpif_Config == GPIF_CONFIG_FPGA_FW_LOAD)
{
status = CyU3PGpifSocketConfigure (3,FPGA_CONFIG_CONSUMER_SOCKET,7,CyFalse,1);
}
gpif_active = CyTrue;
status = CyU3PGpifSMStart (gpif_state_index,gpif_initial_alpha);
return CY_U3P_SUCCESS;
}
Would it be possible to use the FX3 to read and write directly as a host controller to a USB3 mass storage device such as a thumb drive?
Is there any example of firmware base in the SDK or similar that could work as a basis`?
The only examples I've seen for host application is interfacing a HID mouse. I guess only the USB2 part is used.
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