USB superspeed peripherals Forum Discussions
Hi,
Our device is using the EZ-USB FX3 slave FIFO. It works fine when connected to a usb 3.0 host.
With a USB3.1 host (on the same PC!), there are random timeouts during bulk in (USBD_STATUS_CANCELED / error code 997).
Now, I know FX3 does not support 3.1, but I think the host should be backward compatible with 3.0.
cyusb3.sys version is 1.2.3.1.4. Host application is using CyUSB.NET.
Any suggestions?
Show LessHello,
When FX3 is connected to HX3 Hub on board, and FX3 will use USB3.0 SS line only to transmit the data from image sensor,
[image sensor] --LVDS-- [FPGA] --32bit bus-- [FX3] --USB SS-- [HX3]
In this case, what should I treat the USB2.0 D+/D- line?
Is it acceptable leave it open?
Could you provide recommend schematic design for reference?
Best Regards,
Naoaki Morimoto
Show LessThe code I used is from AN65974 - Source files for FPGA code and FX3 firmware;
when I use both FPGA and firmware from the above AN65974, the streamin example work well; PC side streamer.exe also works well; transfer speed is about 380Mbyte/s;
then I change the FPGA code slightly, the PCLK frequency from 100M to 60M , in the PC side, sometimes receive failure happened;
if PCLK is to 40M, in the PC side, more receive failure happen;
Suppose the input data rate is slow down, maybe more time is needed, so I change the PC code : InEndpt->WaitForXfer(&inOvLap,20000); from 2000 to 20000, but the same problem exist;
in 68013A, however, when the input rate is slow down, it works OK
Why this happened, what is the root cause of this problem, and how to make the change so that 3014 works well not only in high speed datain rate but also low speed datain rate?
Hi~ A few months ago I bought two CYUSB3KIT-003 Cypress Development Kits.
I try to learn GPIFII transmission function and try run Designing a GPIF™ II Master Interface example(application note: AN87216)
FX3 Back-to-Back Setup Using CYUSB3KIT-003 like AN87216 Figure 26.
I test Master transform data to Slave was Pass (FX3 Firmware Master = Autoslave.img Slave = AutoSlave.img)
For example, Master-side transfer data 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B total of 8 Bytes to Slave.
Slave-side Receives the correct data from Master.
But test Slave transform data transform data to Master was Fail.
For example, Slave-side transfer data 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B total of 8 Bytes to Master.
But Master-side Receives the error data from Slave. And can not be expected.
What can I do for next step??
Show LessI have two CYUSB3KIT-003 explore kits. Here, I am following "AN87216 - Designing a GPIF II Master Interface" guide to make exchange of data between two hosts as Master and Slave FIFO.
I downloaded and uploaded pre-built firmware images for both the slave device and master device (Autoslave.img and Automaster.img). After uploading, Cypress USB Control Center software shows nothing (before uploading Cypress USB Control Center lists both devices as Cypress FX3 USB Bootloader device). Then, I cross-checked in the device manager, both the device drivers not installed (both are shown as FX3 in other devices). I have tried all the samples from the SDK kit like LED blink, streamer, etc. All the working fine but not for this sample. I have tried all options to install drivers for the device but failed.
What could be the reason? Kindly suggest.
My machine OS is: Windows 10, Windows 7
HI,
if i configure gpif2 for 16bit interface and only using 10 data bit for data trnsfer from external processor to fx3s and can i use remaining 6 data pins as GPIO's by calling gpiooverride API ??
THANK YOU
Show LessHI,
I am using slavefifo interface( AN65974).
My FPGA is in STREAMIN MODE(writting data from FPGA to FX3).
I am using FLAG A and B ,not using FLAG C AND D(dont need to read from fx3 to fpga).
at this condtion,can i use flag c and flag d pins as GPIO's using gpiooverride API?
R is it not possible????
help me...
thank you...
Show LessCould someone in-the-know please check KBA90743 "Interpreting the DMA_RDY Flag of the GPIF II Block of FX3". Its discussion is hopelessly confusing.
This article tries to tackle the topic "The terminology “DMA_RDY” is not quite correct", but it goes a long way to making matters worse.
If parts of the article are to be believed, the terminology is not just "not quite" correct, it would be completely wrong, and such a degree of wrongness should be pointed out extremely clearly. But other parts of the article undermine this conclusion.
Starting point: The discussion revolves around the master-slave interfacem where the FX3 implements the slave, with an external master. Then there are two cases, FX3 sends data through the P port to external device, and vice versa. Now:
1. For FX3 Output:
"For a channel that outputs data to the P-port (to an external chip or device), the DMA_RDY flag indicates whether there is data ready to be read out from any of the buffers. If there is at least one buffer with data committed to the P-port, the DMA_RDY flag is deasserted. It is essentially an empty flag in this case."
a. The narrative claims that when data is ready, the FX3 deasserts DMA_RDY. That would make the name a complete reverse of the meaning. Is this really true?
b. "It is essentially an empty flag, in this case". In which case? For the "output data" case, DATA_RDY assertion means empty? Or is this saying that the DATA_RDY DEassertion case means empty? Because if it's the second, that actually makes sense (DEasserting a READY signal would make sense for buffer empty), but says the opposite of the previous sentence.
2. For FX3 Input:
"For a channel that inputs data to the P-port (from an external chip or device), the DMA_RDY flag indicates whether there is buffer area available to write into. If there is at least one buffer available to be filled with data, the DMA_RDY flag is deasserted. It is essentially a full flag in this case."
a. Again, the description says that when a DMA buffer is available, the FX3 signals NOT ready! A
b. Again, it's not clear what "this case" refers to: the FX3-as-input case, or the flag deasserted case. Again the latter would make sense, but is the opposite of the previous sentence.
What is the actual truth?
Show LessHello,
I am using Fx3S microcontroller for my application. I noticed that standard FaTFS can support the filenames of the format 8.3 and to use the filenames of length>8, we have to change the value of _USE_LFN to 1(2 or 3 based on the need). This macro can be found in ffconf.h header.
If I define change the value of this macro to other than 0, then there are errors in the ff.c file.
Please help in solving this issue, so that I can use Long File Names(LFN) in my application.
Regrads,
Raghavendra.T.R
Show LessHello,
I am using Cypress Fx3S microcontroller in my application. I am using FatFS commands for Read and Write operations from SD Card. I am successfully able to read .txt file. But I am unable to read the .pcm file. Kindly, help me in finding a way to read .pcm file as it is inevitable in my application.
Regards,
Raghavendra.T.R
Show Less