USB superspeed peripherals Forum Discussions
Dear Sir,
I had added HID interface(standard key board type) to my UVC code,and it works fine!
And then I add vendor request interface,according to Vendor Interface in UVC - KBA218335 ,
both HID and vender request interafce are composite device, I can see CX3-UVC[23] , usb input device[24] and unknown[27] from BUS hound tools,
but after several seconds, all of these devices are dispeared.
I add vendor request desciptor (9 bytes) ONLY in SSconfigdesr(USB3.0 mode), update the total length and total interface counts. so 4 interfaces (UVC: 2, hid : 1, and vendor request:1) are configured. the MARCO HID is defined
The following attached file are USB descriptors and bus hound trace.
It may be something wrong with vendor request code in usb descriptors, can Cypress expert give me some advice?
Thanks.
Show LessHi,I have PCB with FX3. When I try to start debud using OLIMEX ARM-USB-OCD-H debuger not work. In console window I see than no jtag connection. But when I connect FX3 to USB bus (to PC) all is work good.
I need debug FX3 not using USB connection. I need help)))
Show LessI have some problems using the SW. The generated files contains inconsistent values and the tools produce values that are sometimes random.
I tried to configure the parameters manually but the result is that the MIPI clock is not generated.
Anyone who has had a similar problem could help me.
Thanks!
I add more details to my brief introduction.
The first approach with Denebola (OV5640) was to acquire an image in RAW8 format and it’s works fine.
The next step was to replace the image sensor with ST VS6955CA. Now the problems begin:
setting the values in the IMAGE SENSOR CONFIGURATION tool I encountered a series of problems.
Sensor Configuration Settings:
CSI clock calculation (MHz):
(H-Active (pxl) * Data Format) / (H-Total (pxl) * Pixel Clock (ns)) / (2 * Data Lane)
Pixel Clock calculation (MHz):
Frame Rate (fps) * H-Total (pxl) * V-Total (pxl)
Now when I select CX3 Receiver Configuration the SW shows …
Ignoring the error report, I enter configuration data:
Finally the cx3config.cycx file generated by the configurator is:
*
## Cypress CX3 configuration settings file
## ===========================
##
## Copyright Cypress Semiconductor Corporation, 2013,
## All Rights Reserved
## UNPUBLISHED, LICENSED SOFTWARE.
##
## CONFIDENTIAL AND PROPRIETARY INFORMATION
## WHICH IS THE PROPERTY OF CYPRESS.
##
## Use of this file is governed
## by the license agreement included in the file
##
## <install>/license/license.txt
##
## where <install> is the Cypress software
## installation root directory path.
##
## ===========================
*/
#include "cyu3mipicsi.h"
/* 5MpixRAW10 : 5MpixRAW10Desc */
CyU3PMipicsiCfg_t 5MpixRAW10 =
{
CY_U3P_CSI_DF_RAW10, /* CyU3PMipicsiDataFormat_t dataFormat */
1, /* uint8_t numDataLanes */
0, /* uint8_t pllPrd */
0, /* uint16_t pllFbd */
CY_U3P_CSI_PLL_FRS_500_1000M, /* CyU3PMipicsiPllClkFrs_t pllFrs */
CY_U3P_CSI_PLL_CLK_DIV_8, /* CyU3PMipicsiPllClkDiv_t csiRxClkDiv */
CY_U3P_CSI_PLL_CLK_DIV_8, /* CyU3PMipicsiPllClkDiv_t parClkDiv */
0, /* uint16_t mClkCtl */
CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t mClkRefDiv */
2600, /* uint16_t hResolution */
1 /* uint16_t fifoDelay */
};
/* VS6955CA_RAW10_5MpixRaw10 : */
CyU3PMipicsiCfg_t VS6955CA_RAW10_5MpixRaw10 =
{
, /* CyU3PMipicsiDataFormat_t dataFormat */
1, /* uint8_t numDataLanes */
0, /* uint8_t pllPrd */
0, /* uint16_t pllFbd */
CY_U3P_CSI_PLL_FRS_250_500M, /* CyU3PMipicsiPllClkFrs_t pllFrs */
CY_U3P_CSI_PLL_CLK_DIV_4, /* CyU3PMipicsiPllClkDiv_t csiRxClkDiv */
CY_U3P_CSI_PLL_CLK_DIV_4, /* CyU3PMipicsiPllClkDiv_t parClkDiv */
0, /* uint16_t mClkCtl */
CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t mClkRefDiv */
2600, /* uint16_t hResolution */
50 /* uint16_t fifoDelay */
};
/* [ ] */
I wonder, why were the following parameters not filled in correctly?
0, /* uint8_t pllPrd */
0, /* uint16_t pllFbd */
I try to set manually these missing parameters into my project, but when I run my application on Denebola, I see that the MIPI clock is not generated.
The unused data lanes are grounded correctly.
What is wrong?
Show Less
We're developing a low-bandwidth low-latency audio application and are investigating the FX3 as a bridge between an FPGA and a host CPU.
Our latency requirements are very strict which makes the USB 2 uSOF specs of 125usec unacceptable.
I have investigated using the CCyIsocEndPoint with USBIsochLoopAuto to measure loopback latencies to/from host (which had a few problems: Multiple uses of XferData for CCyIsocEndPoint ).
#1: What is the expected latency of a loopback over the isoc endpoints? E.g. are there sync intervals similar to the bulk SOF?
(In our first setup we measure write/read latencies of 100-200usec on a real-time thread. This is lower than the uSOF, but variability suggests some sync-latency).
#2: Is it correct to use isoc endpoints with superspeed to achieve lowest possible latency with USB3?
#3: The documentation mentions that bufferlength should be a multiple of 8 times the MaxPktSize. Is this still applicable?
The documentation example for isoc transfer (page 40) uses a buffer of 4096 (= 4*MaxPktSize), and the USBIsochLoopAuto firmware uses a DMA buffer of 1024 (= 1 * MaxPktSize). Also, no errors are thrown using short buffers.
#4: Are there firmware modes I should be using? E.g. does the DMA impose additional latency, and are there requirements for the DMA buffer length?
Any answers and suggestions are much appreciated.
//Rune
Show LessHi,
I've just recently purchased a EX-USB FX3 and have been working out how to create open source firmware useable for this chipset and the developer kit. Unfortunately the license terms of the SDK source code and header files make it impossible to build any open source-able projects for this hardware due to the documentation and api header file licenses.
For example the usb debugger on the FX3 which requires a usb driver as provided in the CyUSBSerial_SDK_Linux can't be packaged for linux distrobutions because the
CyUSBSerial.h license terms do not allow redistribution and thus the otherwise LGPL licensed driver can't be released. Please fix this with urgency.
It would be good if Cypress could review all it's SDK's and at a minimum re-release:
- the header files with open source friendly licenses so that open source applications can be built against them.
- revise the license on technical documentation making it clear that specification information is allowed to be used for the development of open source source software that assists the use of the hardware.
It may be good if the open source licensed headers and any open source software source code is released as separate archives the to the restricted and non-redistributable code and binaries. This would make it easier for those in the open source community to identify and develop with Cypress hardware. It would be even better if Cypress would publish and maintain that open source code in a public version control system such as git.
Thanks
Show LessHi, I saw there is a link for this discussionResolutions with multiple Frame rates in CX3 UVC-CDC ,
I try the suggested solution, and update the value " the length of Class-specific Video Streaming Input Header Descriptor and the total length of CyCx3USBSSConfigDscr"(
I assume the new length is original length+4 for both values in this solution setting). After apply this setting, in the device manager, system report the device cannot start with error code 10. Could someone give me a simple project files to check what I am missing for the multiple framerate setting?
Show LessHello:
I am developing with the denebola RDK now.I read the linux ov5640 driver code, and found out the sensor's frame rate can be changed by register 0x3035, 0x3036, 0x3037 precisely.Actually I just decrease the 0x3036 PLL multiple register by quarter to reduce the frame rate from 60fps to 15ps, and change the CyU3PMipicsiCfg_t parameter by Cx3 configuration tool.But unfortunately I don't see any data output at the DMA transaction, instead Just:DMA RESET, from serial output.
what's the problem with it?
And also, when the denebola is connected to a PC and capturing pictures. I don't see any signal on the PCLK, Hsync, Vsync PINS, which are connected to CX3 Hsync_test..., So how to make this PINs output refrence signal?
Show LessHi,
I am working on SD card, we want to write data to SD card which is coming from FPGA. Creating the DMA channel i.e GPIF II to SD card to write the data.
P to S0 channel for write function.
S0 to U channel for read function.
In control center its not giving any data, obtaining 997 error.
Please verify the below attachment file.
Regards,
Dhanuja
Show LessI'm trying to implement a CDC to UART bridge similar to the cyusbuart example working but without hardware handshake (no CTS/RTS). The cyusbuart example depends on CTS/RTS handshake to disable data into the UART when transferring partial messages that do not fill the entire DMA buffer to the USB (see code from example below). How to do get this same functionality without the CTS/RTS handshake?
Thanks,
Iztok
/* Entry function for the USBUARTAppThread */
void
USBUARTAppThread_Entry (
uint32_t input)
{
uint32_t regValueEn = 0, regValueDs = 0;
/* Initialize the USBUART Example Application */
CyFxUSBUARTAppInit();
/* UART Config Value for Enabling Rx Block */
regValueEn = UART->lpp_uart_config;
/* UART Config Value for Disabling the Rx Block */
regValueDs = UART->lpp_uart_config & (~(CY_U3P_LPP_UART_RTS | CY_U3P_LPP_UART_RX_ENABLE));
for (;;)
{
if (glIsApplnActive)
{
/* While the application is active, check for data sent during the last 50 ms. If no data
has been sent to the host, use the channel wrap-up feature to send any partial buffer to
the USB host.
*/
if (glPktsPending == 0)
{
/* Disable UART Receiver Block */
UART->lpp_uart_config = regValueDs;
CyU3PDmaChannelSetWrapUp (&glChHandleUarttoUsb);
/* Enable UART Receiver Block */
UART->lpp_uart_config = regValueEn;
}
glPktsPending = 0;
}
CyU3PThreadSleep (50);
}
}
Show LessHi Everyone,
I have been trying to program the Slavefifo image file to FX3 RAM and Boot from USB in my Custom Cypress Device Board.
Initially it detects as Cypress Boot Loader and After i have programmed the Slavefifo_loopback image file by using USB Control Center, It shows that Programming Succeed.
After that it never enumerates and shows none of the USB device. Even in Hardware device Manager it never detects any new USB device?.
I have properly Configured the PMODE to Z11 as it for USB Boot.
Same thing i have tried with Cypress DVK Board, in its working perfectly. Its able to remunerate as loopback device.
I guess i have some issues in the Hardware, but couldn't get any hint what it is. Because i have designed the Board based on the Schematics of Cypress DVK.
Could somebody suggest what could be the cause for this issues?
Thanks in advance.
Rgds,
Muthu
Show Less