USB superspeed peripherals Forum Discussions

Hi,

We're currently on the exploratory stage of our project -UVC Camera. We are fixed on using CYUSB3013-BZXC and the ff sensor:

https://www.mouser.co.uk/datasheet/2/308/MT9M114EBLSTCZH3-GEVB_SCHEMATIC.PDF-1224932.pdf

However per checking on the interconnect board, it seems that they are not compatible. The previous version of this board under Aptina was compatible but believe it was changed since the shift to OnSemi brand.

Do you have any recommendations for other sensor or a workaround so that we can use this sensor?

Hello,

I have a CYUSB3065 based design. The firmware is based on an example:

FX3_SDK_1.3.4_Linux/cyfx3sdk/firmware/cx3_examples/cycx3_uvc_ov5640/

All I did is changed the resolution in USB descriptors and replaced the functions related to the image sensor.

For testing, I compiled a simple example of how to grab an image from the USB camera found at:

Simple C++ program to capture a webcam frame in Linux · GitHub

The trick is that every second time I receive 0 bytes from the CX3 and the following error is generated to the kernel log:

uvcvideo: Non-zero status (-71) in video completion handler.

I used Wireshark to monitor the USB traffic and noticed that the camera indeed reports the error. I have several development boards with the same sensor (including Tania dev. board) I use and all these boards behave the same: getting single frame fails every second time, resulting in -71 error code in the kernel log.

I think the fw lib generates the error reply in CX3 somewhere "deep inside" as no callback functions are called. DMA starts running, but the host just closes the connection as the result of the error message. I attach the Wireshark log. I have the impression that host does everything right but CX3 just fails every second time. Any comments, suggestions?

BR, Madis

We use EP3_IN and EP3_Out to communicate with PC, and only transfer short packages(less than 512B);

FPGA read/write FX3's slave FIFO;

Pipe EP3_IN's timeout set to 0xFFFFFFFF;

Now we got a problem:

PC send data to EP3_Out works OK;

The problem is: PC cannot get data from EP3_IN; and only USB3.0 has this problem, 2.0 works OK;

We did a test:

FPGA send 5 packages per second, the first package can be written to FX3 successfully, but after the second write, FX3's FLAGA keeps LOW, as the attached chart shows;

We use FLAGA as *_wr_full signal, only write FX3 FIFO when it's HIGH;

Even if the first package write OK, PC cannot get it, and we see nothing from bus hound;

When this happens, IF we send a package to EP3_OUT, then pc can get the first package from EP3_IN;

We also tried:

Set EP3_IN's timeout policy to 1s, then PC can get a package per second, while FPGA trying to send one every 200ms;

We tried Win_USB driver and Cypress diver, got the same result;

Setting EP3_IN to bulk mode or interrupt mode from FX3 firmware, no change;

Forbid FX3 to enter low power mode, no change;

We can think of nothing to try now, any help will be appreciated!

We use an FX3 with Bootmode "I2C; on failure, USB Boot is enabled"

We would like to have one firmware which can load either from an I2C EEprom or via USB.

Is it possible to detect in the firmware after boot has finished, if the firmware booted via I2C or via USB?

Are there any registers on the FX3 which indicate boot status or are threre I2C or USB registers which could be read to determine if the firmware bootet

from I2C or USB?

Thanks!

Peter

Hi

I'm currently encountering a problem with the CX3 I2C master before the stop condition. It seems that after the last ACK the master waits too long to pull down the SDA line, allowing a pulse on the SDA line right after the slave releases it. I believe that causes some troubles in my slave's state machine as it assumes that another byte is going to be transferred. Indeed, the I2C communication is always stuck after the first write transfer. Is there a way to change the master's behaviour?

I'm using following code for testing:

uint8_t buf[2] = {0x01, 0x70};

preamble.buffer[0] = SENSOR_I2C_WRITE_ADDRESS; /* Slave address: write operation */

preamble.length = 1;

preamble.ctrlMask = 0x0000;

status = CyU3PI2cTransmitBytes (&preamble, &buf, 2,0);

I am new to the EZ USB Suite and USB in general. I was running a few example codes with certain modifications to understand the functioning better.

I have Cypress FX3 SuperSpeed Explorer Kit. I have attached the code below. I used this code with the BookLedBlink example in EZ USB Suite.

I am blinking 2 LEDs alternatively and I have set the delay to 1 second.

The moment I program my FX3 Superspeed, the time period is working correctly. As soon I reset the device, the frequency increases instantly and the desired time period is not achieved. What needs to be done? Can someone give me a working block of code for this and explain what extra things I need to set?

I use CYUSB3065, and I upload the video to the computer through DMA.How do I pause and start the video after it starts?

Hi, I need to be able to compile across Mac OS and Linux using the same version of arm-none-eabi-gcc.

The FX3 SDK 1.3.4 .tar includes version 4.7.2 (yagarto) on Mac and version 4.8.1 (ARM) on Linux.

Does cypress support using the same version compiler across both OS typer by, for example, using the GNU Toolchain | GNU-RM Downloads – Arm Developer?

I know it is technically possible, but I would like to understand the implications of this choice from Cypress's perspective in terms of stability and support.

Thank you for your time.

Hello!

May be, it is a very simple question - in FX2LP I was able to "see" the device as a single instance with 3 endpoints, for example - 1 for Slave FIFO and 2 for UART.

So, I only need to find the device by signature, VID/PID, so on, and use endpoints by calling XferData() method.

With FX3, I should still use endpoints for Slave FIFO, but I need to use virtual COM port to send/receive data to/from UART, isn't it? Or it is still possible to use endpoints for UART too? If so, please show the way.

Many thanks for help!

With regards,

Maksim

I have problem converting AN75779 UVC example to interface with FPGA at 32bit.

How to modify firmware on AN75779 basis