USB superspeed peripherals Forum Discussions

Hi, 

I made my custom board(FX3 and Camera Module).

I connected it and wrote my custom source code.

The black screen was printed in AMCAP, so I checked the debug message with wireshark.

The Wireshark confirmed that the data was output.

The resolution is 340(W) x 260(H), 30fps and 12bit data output.

You can see data in wireshark log.

• wireshark log  => ((16380 * 10) + 13292=177,092     
• resolution  =>  340*260*2 = 176,800
• difference => 177,092 - 176,800 = 292
• As above, additional buffers are entered, and it is necessary to check if there is a problem with the code.

I tried to change DMA Buffer size(CY_FX_EP_BULK_VIDEO_PKT_SIZE and CY_FX_EP_BULK_VIDEO_PKTS_COUNT ) in uvc.h

If i change buffer size, the buffers in the data packet are output differently.

Regards,

Jay

Hi,

My customer is testing I2C master operation using CYUSB3KIT-003.

They used the CyU3PI2cSetConfig() API to set the I2C clock to 400khz.

But the actual frequency measured was 390khz.

Why is it slower than the setting?

How can they get the actual speed to 400khz?

Regards,

Hidekazu Omoi

Hello,

When I was debugging my CX3 UVC project with my own configuration, I encountered the following problem.
Debugging is trapped in the CyCx3UvcAppErrorHandler() API when initializing the MIPI Block module , I want to know if this is a problem with my hardware and I should solve this problem this way, looking forward to your help, thanks a lot.

Best Regards,

Yaqi

I want to use asynchronous SRAM boot mode.

Is there any documentation that details this mode?

Thanks,

Tetsuo

Hi, I've studied the FX3 Programmers Manual for memory related concept. I'm confused with 2 items:

I don't understand it clearly. We use the external ROM to store FW code(.img file) now.
Q1: In that case, we don't need to use the Code Area at all?

I knew the  memory of each thread is created by CyU3PMemAlloc( ) in example code.
Q2: Does it mean that the all the memory created by thread(such as local variable) belong to HEAP memory, not STACK memory?

Any help will be highly appreciated!

I modifed your  CYUSB3014 C# APP program and it runs well.

I want to develp python script with CYUSB3014 configuring FPGA Binary downloading.

Is there python wrapper programs with CYUSB3014 ?

I tried using python clr module. but it failed.

Hi All!

I am a very new at hardware programming.
I try to solve next task.
Some board continuously generates a 16-bit data and clock. Signal data must be transferred to the PC via USB. This board doesn't have any control signals, any adresses and any flags. Only 16-bit data and clock. I use CyUSB3KIT-003 to connect my board with PC. The board is already connected to CyUSB3KIT-003 via GPIO 0-15 (for data) and GPIO 16 (for clock). It needs set up CyUSB3KIT-003 for transfer data to to the PC via USB.
I think I can use "The synchronous Slave FIFO interface of EZ-USB® FX3™ " example described at AN65974 document to solve my task. But I'm not sure.

Help me please understand next points. First, should I use GPIF in my case or not? Maybe there is some other easier way? And, secondly, If it needs use GPIF, is there some fixed sequence for creating interface?

Also I will be grateful for any advice for solving this task.

Hi there,

I'm using Fx3 for y product development,

My requirement is to track time at which certain interrupts occurred.

My plan is that If I have any free running timer so that I can start that timer and track the current time ticks when interrupt occurred that will serve my purpose.

or

If I have any counter so that I can track the count will also help me sort this out.

Also If free running timer is not available, I can also use normal timer and track current ticks count since timer start.

I found that I have "tx_timer_info_get" function in @tx_api.h, but not sure how to use this :

UINT tx_timer_info_get(TX_TIMER *timer_ptr, CHAR **name, UINT *active, ULONG *remaining_ticks, ULONG *reschedule_ticks, TX_TIMER **next_timer);

Can some one help me out with this.

Let me know If I have any of the possibility in Fx3 to achieve this requirement.

Thanks in advance!

Regards,

Pranay.

Hi

I am developing a firmware that streams data  at 1080p@30 fps, I have  attached the parameters given I am not able to do streaming , the project is also attached , Is there any wrong configuration setting.

Thanks in Advance

Hi

I experience an FX3 EP_IN data transfer stop problem. Our design is based on the uvc_cdc example design.

UVC channel is auto_many_to_one DMA, the setting is:

dmaMultiConfig.size = 16384;
dmaMultiConfig.count = 4;
dmaMultiConfig.validSckCount = 2;
dmaMultiConfig.prodSckId [0] = (CyU3PDmaSocketId_t)CY_U3P_PIB_SOCKET_0;
dmaMultiConfig.prodSckId [1] = (CyU3PDmaSocketId_t)CY_U3P_PIB_SOCKET_1;
dmaMultiConfig.dmaMode = CY_U3P_DMA_MODE_BYTE;
dmaMultiConfig.notification = CY_U3P_DMA_CB_PROD_EVENT | CY_U3P_DMA_CB_CONS_EVENT;

dmaMultiConfig.consSckId [0] = (CyU3PDmaSocketId_t)(CY_U3P_UIB_SOCKET_CONS_0 | CY_FX_SOCKET_UVC);
dmaMultiConfig.prodAvailCount = 0;
dmaMultiConfig.prodHeader = 0; /* 0 byte UVC header to be added. */
dmaMultiConfig.prodFooter = 0; /* 0 byte footer to compensate for the 12 byte header. */
dmaMultiConfig.consHeader = 0;
dmaMultiConfig.cb = CyFxUvcDmaCallback; /* use Capture mode's DMA callback */

apiRetStatus = CyU3PDmaMultiChannelCreate (&glChHandleUVCStream,
CY_U3P_DMA_TYPE_AUTO_MANY_TO_ONE,
&dmaMultiConfig);

CDC channel is manual DMA, the setting is:

/* Create a DMA_MANUAL channel between UART producer socket and USB consumer socket
* Use a smaller buffer size (32 bytes) to ensure that packets get filled in a short time.
*/
dmaCfg.size = 32;
dmaCfg.count = 32;
dmaCfg.prodSckId = (CyU3PDmaSocketId_t)(CY_U3P_LPP_SOCKET_UART_PROD);
dmaCfg.consSckId = (CyU3PDmaSocketId_t)(CY_U3P_UIB_SOCKET_CONS_0 | CY_FX_SOCKET_CDC);
dmaCfg.notification = CY_U3P_DMA_CB_PROD_EVENT;
dmaCfg.cb = CyFxUART2USBDmaCallback;

apiRetStatus = CyU3PDmaChannelCreate (&glChHandleUarttoUsb,CY_U3P_DMA_TYPE_MANUAL, &dmaCfg);

Test setting is:

An app from host PC connect with FPGA through CDC channel. This app enable FPGA to generate UVC traffic, after this the app doing nothing, so there is no traffic flow on CDC channel.

Window "Camera" play video FPGA generated (sent to host PC through UVC channel). The rate is about 320M Bytes per second (90% of GPIF bus bandwidth)

The traffic stop is random, some time in a few minute, sometime a few hours, most time never happens. I am able to reproduce this problem by adding 4 hubs between host PC and device. 

Most time when UVC traffic stop, CDC upstream traffic stop as well, CDC downstream traffic is still ok.

If I build FX3 firmware with SDK1.3.3, I can resume CDC upstream traffic by close and re-open host PC app(close and open uart port). UVC traffic can be recovered by changing video channel (in side FX3, uvc related endpiont and DMA channel will be deleted and re-created).

If I build FX3 firmware with SDK1.3.4, this problem will happen much much less often, but once happens, host PC apps freeze, I have to unplug USB cable to close apps, but in one time after about 20 seconds, CDC and UVC channel recovered by itself.

I used a USB analyser to capture traffic to and from FX3, there is no CRC error, the traffic stop is because FX3 send a NRDY transaction packet to host PC (there is no ERDY transaction packet send out by FX3 after NRDY)

Following is a screen shot of some captured data, there are about 30 to 50 unexpected transaction (in class view of usb analyzer) before NRDY, but they look the same as those good one.

Any one has any idea about this please give me a help, Thanks!