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USB Superspeed Peripherals

MaXi_1246331
Contributor

In AN84868, the Fx3 switch to slave fifo mode when it completes the configuration of FPGA. In my FPGA application, after configuration the FPGA does not transfer data with FX3. The FPGA requires FX3 to send it a trigger signal and read back its response. It needs 3 GPIOs in total (2 pins for response) . I define them to GPIO(0, 1, 2) according to hardware connection. I develop my firmware based on that of AN84868.  I should free these GPIO from slave fifo interface, so that it can be used as GPIO. I should remove slave fifo function in AN84868. I find in GPIF designer that I have to choose master interface or slave interface. Both are not my desired option. I only hope to choose GPIO. Can you help?

Thank you.

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1 Solution
YiZ_31
Moderator
Moderator

Hi,

GPIF designer cannot define GPIO. Unused pins can only be override as GPIO in firmware.

Regards,
Eddie

View solution in original post

4 Replies
YiZ_31
Moderator
Moderator

Hi,

So you want to override them as custom GPIO in your firmware and use other pins in GPIF? That's applicable.

Regards,
Eddie

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MaXi_1246331
Contributor

I should use SPI interface pins and 3 GPIO pins in FX3. I have find overide function to solve the problem, Is there any more solution? Is there any method to solve it by GPIF Designer?

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YiZ_31
Moderator
Moderator

Hi,

GPIF designer cannot define GPIO. Unused pins can only be override as GPIO in firmware.

Regards,
Eddie

View solution in original post

MaXi_1246331
Contributor

Thank you. the problem is solved

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