How to generate specific control signal by GPIF2 designer?

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Anonymous
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Hi All,

   

 

   

I want FX3 generate digital video signal as video pattern generator. The signal I needed are pixel clock, horizontal reference(h-ref, someone says (data enable)DE signal), vertical sync(v-sync), and data. 

   

 

   

For example. we can see the signal like as application note AN75779 "Interfacing an Image Sensor to EZ-USB® FX3™ in a USB video class (UVC) Framework"  Figure2

   

 

   

In actually I want generate signal include "FV" , "LV" , "PCLK" , "DATA" whole signal in Figure2.  Does GPIF2 designer can support this type signal?

   

 

   

Thanks.

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Anonymous
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Hi,

   

Yes. You can generate those signals with the help of GPIF II of FX3.

   

First of all, you need to configure GPIF II in master mode so that you can make use of DR_GPIO action.

   

You can use DR_GPIO to generate FV and LV.

   

You can generate data in the firmware and you can place it on the data bus using DR_DATA action.

   

FX3 can provide a interface clock to the external device which can be used as PCLK in this case.

   

Thanks,

   

Sai Krishna.

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Anonymous
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Hi RSKV,

   

 

   

Thank you for your reply.

   

But in GPIF2 designer, we just have one CTRL_COUNT and one DATA_COUNT.   If I want to generate the exactly timing. Like below:

   

 

   

                                          |--------------------|

   

V-sync-----------------------|<--33584clk-->|-------------------------------------------------------------------------------------

   

                                                                      |<-13832clk->|

   

                                                                                               |-----------|               |-----------|

   

Href  ----------------------------------------------------------------|1280clk |-----------|               |-------------

   

                                                                                                             |<-408->|

   

 

   

I suppose this timing can't be generated caused just one CTRL-COUNT and one DATA-COUNT

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Anonymous
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the waveform layout is not correct.  I redraw one and upload to this thread.

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Anonymous
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Hi,

   

 

   

I still think that we can implement this design with FX3.

   

We have 3 counters: DATA_COUNT, CTRL_COUNT and ADDR_COUNT.

   

You can load these three counters with three different values so that it covers 3 timing paramters from the timing diagram that you showed it to me.

   

For meeting the 4th timing paramter you can keep on updating one counter value from the firmware.

   

In the FX3 firmware, you can look for which state you are in the GPIF II state machine and based on that state number you can modify one counter value to address 4th timing paramter. Once that is done then you can update it again with the previous count value.

   

Please let me know your comments on this.

   

 

   

Thanks,

   

sai krishna.

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Anonymous
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Hi RSKV,

   

 

   

Thank you very much.

   

But I decide to use another fpga to generate control signal for more precisely timing requirement.

   

So my system will be :

   

PC<-->FX3<--->FPGA--> output

   

 

   

FYI.

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Anonymous
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Good to hear that.

   

So you will be sending the video data from PC over USB. Is that right?.

   

could you please let me know your company name.

   

Thanks,

   

Sai Krishna.

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Anonymous
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I personally feel that this application is really a interesting one.

   

 

   

Thanks,

   

Sai Krishna.

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Anonymous
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Hi RSKV,

   

 

   

How to contact you by email? I suppose we can have more discussion.

   

 

   

Thanks.

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Anonymous
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Hi,

   

You can reach me at rskv@cypress.com

   

Thanks,

   

sai krishna.

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