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Hello,
can i use UART_RTS,UART_CTS,GIPO[26],GIPO[27] as spi signals in FX3?
I have found example in the path C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\serialif_examples\cyfxusbspigpiomode.can i implement the spi controller using this example and above gpios?
thank you.
Solved! Go to Solution.
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Hi,
I had understood your question wrongly.
CyU3PMemSet ((uint8_t *)&io_cfg, 0, sizeof(io_cfg));
io_cfg.isDQ32Bit = CyFalse;
io_cfg.s0Mode = CY_U3P_SPORT_INACTIVE;
io_cfg.s1Mode = CY_U3P_SPORT_INACTIVE;
io_cfg.useUart = CyTrue;
io_cfg.useI2C = CyFalse;
io_cfg.useI2S = CyFalse;
io_cfg.useSpi = CyFalse;
io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT;
As per the reference above, UART_RTS and UART_CTS i.e GPIO[53], [54] alongwith GPIO[26],[27] can be used as software (bit banging) SPI signals.
Regards,
Rashi
Rashi
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Hi,
GIPO[26],GIPO[27] can be used as SPI in the example you mentioned. But, we are not sure which GPIOs you mean when you mention UART_RTS and UART_CTS.
In the example that you are referring, UART is being used since io_cfg.useUart = CyTrue; And since the GPIF Bus width in the example is not 32 bit (because io_cfg.isDQ32Bit = CyFalse;) the UART pins would be GPIO46, 47, 48 and 49. You cannot use any of these in that example.
By mentioning UART_RTS and UART_CTS in your question, if you mean GPIO53 and 54, then you can use them.
Regards,
Rashi
Rashi
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Hello,
UART_RTS and UART_CTS are GPIO[46] and GPIO[47] respectively.why i cannot use these pins as gpio when UART is being used io_cfg.useUart = CyTrue.
uart signals minimum requirement is uart TX ,RX and gnd.
by calling CyU3PDeviceGpioOverride API,I can use them as GPIO with uart.
let me know the reason?
thank you.
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Hi,
As per the example you mentioned in the question, GPIO[46],[47],[48],[49] can be used for UART (io_cfg.useUart = CyTrue). As per the UART requirement GPIO[48], [49] can be used as TX, RX respectively and GPIO[46], [47] can be used as GPIO if CyU3PDeviceGpioOverride API is called.
But the above mentioned GPIO's ( [46],[47],[48],[49]) cannot be used for implementation of SPI controller ( as per your previous question).
Regards,
Rashi
Rashi
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Hi,
As per the UART requirement GPIO[48], [49] can be used as TX, RX respectively and GPIO[46], [47] can be used as GPIO if CyU3PDeviceGpioOverride API is called.
->if GPIO[46], [47] can be used as GPIO after CyU3PDeviceGpioOverride API.Why cant use these two pins for implementation of SPI controller when GPIO[48], [49] can be used as TX, RX respectively.
But the above mentioned GPIO's ( [46],[47],[48],[49]) cannot be used for implementation of SPI controller ( as per your previous question).
->why?
thank you.
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Hi,
I had understood your question wrongly.
CyU3PMemSet ((uint8_t *)&io_cfg, 0, sizeof(io_cfg));
io_cfg.isDQ32Bit = CyFalse;
io_cfg.s0Mode = CY_U3P_SPORT_INACTIVE;
io_cfg.s1Mode = CY_U3P_SPORT_INACTIVE;
io_cfg.useUart = CyTrue;
io_cfg.useI2C = CyFalse;
io_cfg.useI2S = CyFalse;
io_cfg.useSpi = CyFalse;
io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT;
As per the reference above, UART_RTS and UART_CTS i.e GPIO[53], [54] alongwith GPIO[26],[27] can be used as software (bit banging) SPI signals.
Regards,
Rashi
Rashi