A note on page 8 of the CYUSB306X datasheet states the following:
REFCLK and CLKIN must have either separate clock inputs or if the same source is used, the clock must be passed through a buffer with two outputs and then connected to the clock pins.
For the same source approach, I presume the buffer is required to optimize signal integrity. However, what if I were to route the output of the clock source (i.e. oscillator) to REFCLK and CLKIN in a daisy-chain fashion with a termination resistor to GND at the end of the trace as shown in the figure below? Note that the termination resistor matches the characteristic impedance of the trace to ensure no reflections. Assuming that the clock source has a very low output impedance, it seems that the resulting waveform at the REFCLK and CLKIN inputs would meet the requirements of the CYUSB306X. In other words, is there some other reason - aside from signal quality degradation - that the buffer is required if a single clock source is used for REFCLK and CLKIN?