USB low-full-high speed peripherals Forum Discussions
Hi,
How FX2LP could send USB ACK or NACK to the host upon a vendor request execution?
Hi,
My customer wants to know if he can see two devices in Linux system when CY7C65215 is configured as SPI and I2C on the two channels.
Regards,
Kyle
Show LessHi!
Following the CyUSB.NET.pdf file (2018, according to this is the lastest version https://community.infineon.com/t5/USB-superspeed-peripherals/CyUSB-NET-manual/td-p/105011) of the FX3 SDK , how can I program the EEPROM of a FX3/CX3 with my C# code?
Should I use this function?
"4.9.1 DownloadFw( )
Description
The DownloadFw method of CyFX3Device allows the user to download firmware to various media such
as RAM,I2C E2PROM and SPI FLASH.
The file name of the firmware file is passed as the first parameter to the API. The file must be a *.img
to keep this operation from failing."
Thank you!
Show LessHi,
Despite what it says on the KB page ( https://community.infineon.com/t5/Knowledge-Base-Articles/Mouse-Sample-Firmware-for-CY7C63001A-PC/ta-p/257171 ) the support team doenst have this data any more, or doesnt want to share it. So I am looking out there with people to obtain this firmware samples, does anyone have it ?
Cheers,
Luc
Show LessHello Infineon Support,
Thank you for your usual support.
My customer has a question.
The FTDI FT232R currently in use is in Asynchronous Bit Bang Mode.
Is there an equivalent specification for CY7C65213A?
https://www.ftdichip.com/Support/Knowledgebase/index.html?asynchronousbitbangmode.htm
Best regards,
Koki
Show LessWe are using CY7C67300 in our design to facilitate USB HOST and SLAVE functionality to our NXP controller. we are using CY7C67300 in co processor mode using hardware configuration. Now CY7C67300 obsoleted. We are planning to replace CY7C67300 with FX2/FX3.
what steps we need to follow to configure FX2/FX3 in co processor mode ?
1. Is it required to program FX2/FX3 separately to interface with our main controller?
2. Is GPIF II support parallel bus interface?
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Hi Infineon Support,
I asked a question about VCCIO in the below Community case,but there's something else I'd like to check..
In this case,It is mentioned that "VCC is used for VBUS detection where VCCIO is connected to the core and IO."
Is it correct to think that this is when power is being supplied to the VCCIO pin?
Also, if power is supplied to VCCIO but not to VCC (VBUS), what kind of control will be used?
In that case, is it correct to stop output from USBDP and USBDM?
Best regards,
Koki
Show LessAs in the title,
1. How to build the CY7C68013 development environment under WIN10?
2. I have already installed the CYUSB3014 development environment, will the two conflict?
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/%E4%BD%8E%E9%80%9F-%E5%85%A8%E9%80%9F-%E9%AB%98%E9%80%9F-USB-%E5%A4%96%E8%AE%BE/%E5%9C%A8WIN10%E4%B8%8B%E6%80%8E%E4%B9%88%E6%90%AD%E5%BB%BACY7C68013%E7%9A%84%E5%BC%80%E5%8F%91%E7%8E%AF%E5%A2%83-%E6%88%91%E5%B7%B2%E7%BB%8F%E5%AE%89%E8%A3%85%E4%BA%86CYUSB3014%E7%9A%84%E5%BC%80%E5%8F%91%E7%8E%AF%E5%A2%83-%E4%B8%A4%E8%80%85%E4%BC%9A%E4%B8%8D%E4%BC%9A%E5%86%B2%E7%AA%81/td-p/685486
Show LessHi,
I have tiny eeprom attached to FX2LP over the I2C bus.
I read about SW1 and SW2 for device to boot into Cypress FX2LP No EEPROM.
Is there additional condition such as certain bytes in certain locations of tiny eeprom to exist for this boot option to work?.
Show Less