USB low-full-high speed peripherals Forum Discussions
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Hi!
We are trying to integrate the CCG3 (using the CY4531 kit) with an embedded controller (EC) so that we can interact with the PD-negotiation process. However, we can't find any documentation of the I2C interface or example on how to use the HPI interface. Are there any pointers for this?
Also, is there a guide for how to setup runtime debugging between PSoC Creator and the CY4531 kit? Should we use the SWD-port this and a MiniProg? Or can it be done using the USB port we use for uploading the firmware. Couldn't find any documentation around this.
Kind Regards
Christian
Show LessHi all.
I'm almost new with FX2LP devices
One part of my project is transmitting data in rate 60Mbyte/s .
I want to use CY7C68013A for this purpose.
In PC side i have to develop soft ware which communicate with my board.
is it possible to use no external memory at all and every time the soft ware started it program CY7 individually ??
thanks.
Show LessHi,
I have a general question about the data structure used in the BeginDataXfer(), WaitForXfer() and FinishDataXfer() methods. I am following the C# examples provided. My doubt is related how to extract the data received after the next piece of code:
EndPoint.FinishDataXfer(ref cBufs
If the transactions was sucesfull I have a filled xBufs buffer, but my question is related how to extract the "clean" data, it means only the data received. In this example I have 16 packets per Xfer and 8 Xfers to queue. This way xBufs is an array of 8 by 8192 bytes of size.
Show Lesshi all.
I'm new with Cypress Chips.
I have Some question's.
Can i Configure any Xilinx's FPGA with FX2LP Chips For example any spartan family ??
based on AN63620 i have to IFCLK pin to CCLK but is there different way that i configure FPGA wihout this pin?
i want to use ths pin for slave fifo interface....
thanks alot...
Show LessHi All,
I am using AN75779 example code.
I am trying VGA@30fps for that i have done below changes
--> In descriptor file
/* Class specific Uncompressed VS Frame descriptor */
0x15, 0x16, 0x05, 0x00, /* 30fps */
--> In uvc.c
/* UVC Probe Control Setting for a USB 2.0 connection. */
0x15, 0x16, 0x05, 0x00, /* Desired frame interval in the unit of 100ns: 30 fps */
--> I configure my camera with VGA@30fps
But still i got 15fps in my host side?
Give some suggestion for 30fps?
Regards
RAJ M
Show LessGood day, i need driver for windows 7 x64 for device cy7c68001.
if you have the driver, can you send it to my e-mail: ge-520@ngs.ru ?
Show LessDatasheet says that this circuit manage USB chapter 9 (except set/clear feature).
But when I am doing those microsoft tests I get 2 failures on USB framework test.
Bad GetDescriptor command and some other bad command.
It should return an error code or NACK.
But the test fails.
Anyone who has signed this driver with this old chip SX2 ?
Show LessHi all
I design a board for spartan 6 and for connect to laptop need to full speed mode (2 layer pcb) but I can not use a full speed controller. can I use cy7c68013 in full mode(12 mb).I confuse to interface spartan 6 to cy7c68013 in full mode . I design interface in this picture.
Show Lesshi,
I have a FX2LP configured in slave fifo (with an external device that is reading data). I have endpoint 2 and 4 configured as bulk endpoint in manual mode, with buffered 2x of 512 byte length.
I would know if when 8051's FX2LP is accessing fifo data - before commit packet - is a safe practice, even if external device is reading data from slave fifo. 8051 checks fifo empty flag before accessdata, and external device checks hardware empty flag before read data from slave fifo.
What is the point of view of Cypress? Is there something to do for safety?
Best Regards
begos
Show Less