USB low-full-high speed peripherals Forum Discussions
I want to use cypress fx2 to emulate epp parallel port can any one help to develop code for fx2 .or any application note regarding epp emulation on fx2
Show LessHi,
I have a question When is try to build the firmwarer for FX2LP using keil uVision2.
The build result is shown attached pic.
I can’t find the exit-code =4
also, I don’t know what is means
could you give me solve or advice about this problem.
My dev system base on windows10, and I try also windows7 dev system too. But it’s result same.
Show LessHello
i am new at cypress. i used avr, nxp, stm32 but i havent used cypress devices before. when i saw psoc arm and psoc creator i am amazed and i liked it.
Now i see lots of usb devices on cypress.
i want to send data from psoc arm to usb 2.0 / and from computer i want to send some data to psoc 5lp. there are lots of usb modules but i cant select them clearly. For example i measured adc and i want to send it to computer. but i dont want to use usb/uart converter. i need fast communication. usb2.0 12mbit/sec or 480mbit/sec.
Can you help me which one must i use?
thanks in advance
Show LessHi!
I'm new with CYUSB and met some problems. I have made my own PCB with Altera FPGA and CY7C68013A. And I have made a mistake that I set the IFCLK pin in FPGA side as an input only pin so I have to use 68013A's internal clk.Is my understanding right that I can use it that way in synchronous slave FIFO?
I have test my code, and found when I assert SLOE and SLRD, FD[7:0] can set the first data correctly but it seems that the FIFOptr never change, data did not change and empty flag remain high.then I try it in writing, than I found the same problem ,Ican see the FPGA program function well that the FD[7:0] repeatly raising from 0 to 256, SLWR low and IFCLK in a sin curve but empty flag still low.
I also tried Asynchronous mode and met the same problem.
I have upload my code. It wouldn't be more thanksful from me that anyone could help me to solve that problems.
Show LessHi there,
I'm trying to establish a synchronous Slave FIFO read between the FX2 and an FPGA.
The FPGA is providing the interface clock (20MHz) and runs a state machine that toggles the SLRD and SLOE lines according to figure 9-17 in the Technical Reference Manual.
If I now send data over USB to EP2 I expect the data to be driven out on the FD (byte wide) lines. I get the right amount of rising clock edges according to how many bytes I have sent to EP2 until the empty flags gets deasserted. However, the FD lines seem to be stuck on the first byte, or are alternating between the first two bytes for the whole transmission. I attached a picture of the logic analyzer software.
Has anyone seen something like this before? Any solutions.
Show Lesshi, i want to program FX2LP's Ram in a C++ application.(precisely what Control Center do when click ProgramFX2=>RAM). but the function LoadExternalRam (in C# source of control center) is not available in CYAPI. what i should to Do?
thanks
Show LessI am in need of a a USB cable solution that would let me use an old CY3672B unit on USB. I assume the "USB" version of the programmer just used a USB->parallel adapter cable as I see signs of FTDI FTD2XX drivers in the software. Might there be a commonly available "USB printer" cable based on the FTDI chip that would work?
Alternately I can probably get by with an old version of the CY3672 programmer software that works with parallel ports on WinXP if I absolutely had to.
thanks,
Steve
hi.
when i copy fw project from c:\cypress\usb\target\fw\lp (all files in the folder) to an other location for example: ~my documents\keil_prg\lp and open the project with uvision3 it does not know the path for EZUSB.LIB and USBJmpTb.OBJ it looks in ~my documents\keil_prg\lib\lp for it .
also in another project when I write :
#include "fx2.h"
#include "fx2regs.h"
#include "syncdly.h"
after build this error occures : can't find file 'syncdly.h'
I checked for the file it was in the same folder as fx2.h and fx2regs.h in "c:\cypress\usb\target\Inc"
also unchecked Project -> 'Options for Target' -> the 'A51' tab -> and uncheck 'Define 8051 SFR Names'. according to :
http://www.keil.com/support/docs/1859.htm
could you please help me?
Show LessI bought a cypress CY7C68013A to restore the boot of a gigablue.
I tried it on Windows 10 x64 with Windows7 x32.
To use Broadcom interfacciarmi 3 study
The few times I can not connect after a few seconds I get the disconnection
with the following error: i2c removed
Can you help me ?
I thank you in advance.
Show Less