USB low-full-high speed peripherals Forum Discussions

Hello,

I am using CYUSB232 RDK to check the operation of CY7C65213-32LTXI.

After connecting the device to the USB, its TXD line is High.

However, once the port is opened / closed by software (ex. TeraTerm Pro), the TXD line becomes indeterminate(Probably Hi-Z state).

Therefore, incorrect data will be sent to the receiving side.

Is there a way to avoid this situation?

Thanks,

Shimamura

Hello,

I am using CY7C68013A for data transfer between FPGA and PC. I am using internal clock of 48 MHz for Cypress and 100 MHz for FPGA.

So how should i sync. all the signals w.r.t. IFCLK?

Thanks!

--

Regards,

Avinash

Dear Madam/Sir：

         After I download FW to Our USB TV dongle, The device manager shows a yellow warning as my attachment. .Can you tell me how to cover this issue?

         Thanks

在新设计的FX 3014单板上增加了调试串口芯片CY7C65215,为什么win7的设备管理器的com口识别出两个串口？并且串口打印不出任何信息。

而官方的SuperSpeed Explorer Kit开发板的CY7C65215的调试口只显示一个串口，打印信息也正常。

我设计的单板原理图和官方的开发板是一样的。请帮忙，多谢。

Hi,

Need a low-power USB, Audio device class 2.0 to I2S bridge,

so looking at FX2LP FX2LP18 to do this in combo with some ARM cortex CPU.

What power consumption should I expect when running say a 44.1/16 bi-directional uac2 stream using hte FX2LP?

Thanks David

Hy

I try to suspend the FX2LP. I set SUSPEND to any value (e.g. 0x10) but it doesn not go to suspend (I check it by TD_Suspend ran or not. or It does not run in that case?)

If a set Sleep = TRUE, TD_Suspend ran and go to sleep. How should I exaclty suspend the FX2LP? An how can I check it?

If FX2LP is suspended, is it enough to send a intterupt/bulk/or any msg from the host to FX2LP to wake up? Because in that case TD_Resume funciton didnot run.

How should I exactly wake up FX2LP?

Thanks,

domi

Dear Madam/Sir:

         We use Cypress USBsuite to download iic file to EEPROM(AT24C256)，It seems that Only “Universal Serial Bus controller” display with “Cypress EZ-USB FX2LP No EEPROM,”  Cypress USBsuite can download iic file ， which means 1 EEPROM can only be download once.

          How can  I download several times to EEPROM?

1、 Device manager里面Universal Serial Bus controller显示Cypress EZ-USB FX2LP No EEPROM(3.4.5000),使用USB Control Center成功download FW（bulkloop.iic）一次

Hello,

I am trying to send data to FX2 - CY7C68013A from FPGA, but FIFOIN is not working.

When i try to program EEPROM by iic file, its failing. What can be the reason here?

Regards,

Avinash

Please see the attachment:

1. Below is the hardware connections:

2. Below is the CY68013 firmware:

CY68013 configuration:

1. 1) Internal 48MHz, output inverted 48M on the CLKOUT pin,  provide the clock to FPGA;
2. 2) FLAGB – EP6FF, FLGA2 – EP2EF;
3. 3) Internal 48MHz, Sync Slave FIFO interface;
4. 4) EP2 & EP6 WORDWIDE=0, 8bit data width;

3. Below is the FPGA Verilog:

     FPGA used CY68013’s CLKOUT to its work clock.

     When user press key down, drive “SLWR” to LOW;

When SLWR = 0, FPGA send incremental data to CY68013.

4. Below is the USB Data IN:

Hello,

We are considering use CY7C68013A-56LTXI as bridge chip between USB and I2C interface.

However, we are thinking of impossible to use like this because this chip is basically use GPIF as data line from FPGA or ASIC.

Please let me know if we can do I want.

Best regards,