Anonymous
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Mar 16, 2010
09:47 PM
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Mar 16, 2010
09:47 PM
Host transfers 8k data to peripheral through FX2LP. However, the last 4k data is lost (what is root cause of data lost?). FX2LP is configured as auto out mode and roughly setting is shown as following:
TD_Init () :
CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1); // set the CPU clock to 48MHz
EP2CFG = 0xA0; // EP2OUT, bulk, size 512, 4x buffered
EP4CFG = 0x00; // not valid
EP6CFG = 0x00; // not valid
EP8CFG = 0x00; // not valid
EP2FIFOCFG = 0x00; // allow core to see zero to one transition of auto out bit
EP2FIFOCFG = 0x10; // auto out mode, disable PKTEND zero length send, word ops
TD_Poll():
if( GPIFTRIG & 0x80 ) // if GPIF interface IDLE
if ( ! ( EP24FIFOFLGS & 0x02 ) ) // if there's a packet in the FIFO domain for EP2
{
if ( ext device not full )
{
SYNCDELAY;
GPIFTCB1 = 0x02;
SYNCDELAY;
GPIFTCB0 = 0x00;
SYNCDELAY;
GPIFTRIG = GPIF_EP2; // launch GPIF FIFO WRITE
SYNCDELAY;
while( !( GPIFTRIG & 0x80 ) ) // poll GPIF Done bit
{
;
}
SYNCDELAY;
}
}
}
TD_Init () :
CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1); // set the CPU clock to 48MHz
EP2CFG = 0xA0; // EP2OUT, bulk, size 512, 4x buffered
EP4CFG = 0x00; // not valid
EP6CFG = 0x00; // not valid
EP8CFG = 0x00; // not valid
EP2FIFOCFG = 0x00; // allow core to see zero to one transition of auto out bit
EP2FIFOCFG = 0x10; // auto out mode, disable PKTEND zero length send, word ops
TD_Poll():
if( GPIFTRIG & 0x80 ) // if GPIF interface IDLE
if ( ! ( EP24FIFOFLGS & 0x02 ) ) // if there's a packet in the FIFO domain for EP2
{
if ( ext device not full )
{
SYNCDELAY;
GPIFTCB1 = 0x02;
SYNCDELAY;
GPIFTCB0 = 0x00;
SYNCDELAY;
GPIFTRIG = GPIF_EP2; // launch GPIF FIFO WRITE
SYNCDELAY;
while( !( GPIFTRIG & 0x80 ) ) // poll GPIF Done bit
{
;
}
SYNCDELAY;
}
}
}
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