USB EZ-PD™ Type-C Forum Discussions
i want to find where in the code i could see slave address
the slave address set i n top design i m review the code but didn't find file header or source where defines i2c slave address
Q1 : where in the source i could see slave address ?
Q2: it is possible to change top design parameters ( i2c slave address ) from command line
when run .\cyprjmgr.exe -wrk "xxx.cywrk" -build
Q3:
Show LessI came up with an idea using USB Power Delivery / Quick charge. I did some research in the topic, but please excuse me if my terminology is not correct.
The device I would like to make is a fairly simple charge controller for phones/notebooks. It only has 2 type-c connectors, one for the power source and one for the phone/notebook which has to be charged. The phone/notebook is running some software which is communicating with the charge controller over USB, using this the user is able to limit the charge speed or set battery limit (e.g: stop at 80%).
During my research I found your company product EZ-PD™ CCG3PA which seems a perfect fit to this problem. I watched the video series and read some specifications/articles on the topic, but I'm still not sure if this idea is feasible.
As an expert what do you think is this idea feasible?
Are there any similar products which I'm unaware of?
Are there any common pitfalls which I should be aware of?
Thanks in advance,
Gabor
Show LessOur firmware is monitoring a fault gpio line from a load switch that is asserted when a connected device is faulting and pulling too much current. If fault condition does not clear within certain time I call app_disable_pd_port() to disable further activity on the port.
After a delay and when the fault flag has cleared I want to enable the port again. What is the correct way to do this? There is no symmetric API call to enable the port.
We're using CYPD5225-96BZXI. Source mode only.
Show LessWe found an issue where I am not sure if this is an issue with the cypress sdk.
but if we plug a pair of XiaoMi Type-C earphone BRE02JY into port 0 the device will continuously reset.
If we plug the device into port 1, then the reset does not happen and these headphones work normally.
I have checked the configuration (attached) in ez_pd configurator and as far as I can tell both ports are setup the same.
Looking at interrupts coming from the device over the EC i2c interface - this part will continuously respond with code 0x80 on the device interrupt register which is the RESET_COMPLETE event. indicating that the device is rebooting over and over as long as this device is attached to the port.
[814.508406 PD Controller 1 Port 255 Code 0x80 Response Len: 0x00]
[814.582658 PD Controller 1 Port 255 Code 0x80 Response Len: 0x00]
[815.862641 PD Controller 1 Port 255 Code 0x80 Response Len: 0x00]
[815.936897 PD Controller 1 Port 255 Code 0x80 Response Len: 0x00]
[817.216020 PD Controller 1 Port 255 Code 0x80 Response Len: 0x00]
[817.290269 PD Controller 1 Port 255 Code 0x80 Response Len: 0x00]
......
Please provide me the REV04 - CCG3PA EVK schematic
Hello
We will prepare a parameter sheet for CCG6. Therefore, I would like to clarify whether the following devices include encryption FW.
・CYPD6127-48LAXI
・CYPD6227-96BZXI
I think the device shipped from Cypress includes a FW (boot loader), and is the FW included encryption function.
If so, please tell me what lkind of encryption function is included?
Best Regards
Arai
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Hi Cypress
In the process of updating Retimer FW on our TGL-U Platform , We have first requested HW to switch to FW update mode before performed Retimer capsule update, We found that it did not enter update mode ( We use Intel Tool for detection ) so that we need your help as below , Thank !!
1.Please refer to the orange box : How to enter FW update mode? How to check it already enter FW update mode ?
2.Please refer to the red box : Our design does not have EC ( We use BIOS for update process) so that we need to know which Command or message will be sent back to EC after Retimer self-checking ? Then what will CCG5 send back to EC to complete the entire Update process?
3.Do you have any update details sequence or sample codec for reference , Thank !!
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If it enable the OTP setting in the Configuration Utility, some setting items will be showed. Please tell me the meaning of these.
Or, if it is mentioned in the documentation, please tell me where it is.
Thanks,
Tetsuo
I get the following error. I would like to know the solution.
CY4532
Flashing device is UFP, initiating DR_SWAP
DR Swap Successful
PD contract established.
Error: GET_SILICON_ID VDM failed
Retrying, ignore the above error message
Error: GET_SILICON_ID VDM failed
Retrying, ignore the above error message
Flash update mode (4b4, 1) entered
Error: Failed to update FW/Config Table of Type-C device
Error: DLL call returned error while flashing
Best Regards,
Show LessHi I am trying to recreate these circuits but would like to be able to operate at 10Gbps. The CYPD3120-40 in the diagrams only supports 5gbps.
What other devices are capable of 10Gbps and Sink operation that would work in the diagrams instead?
Thanks
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