Device specifications for CCG3PA

[NoAr_1540581]

Hello

Is it possible to share the following documents on device specifications?

a) Control sequence of FET at completion of Power Rule negotiation
b) Sequence at the time of protection function operation such as OVP
c) Sequence when connecting Quick Charge / Apple Charge
d) Rising/ falling sequence of input/output of the following pins
・ TYPE-C VBUS (input)
・ VBUS-C (output)
・ CC1 (or those who understand the communication waveform with CC2)

Best Regards

Arai

[ShifangZ_26 · Accepted solution]

Hi Arai,

1. The documentation you are looking for is Type-C and Power Delivery SPEC. Whatever MOS FET control with enable and disable is aim to follow those SPECs.

2. For your questions:

a. Control sequence is based on what's role of Type-C port is going to support. For example, Power source role enable:

a1>> Before attach Type-C sink, MOS FETs shall be disable for achieving Safe0V.

a2>> Attached. And then, Rp and Rd is present. And Type-C enter Attach mode. MOS FETs shall be enable for achieving Safe5V.

a3>> Enable VCONN if it have capabilities. And send SOP' for cable discovery identify.

b4>> Discovery SOURC_CAP on CC.

....

b. For OVP.

>> When OVP is occurred. MOS FETs shall be disable for being deleted OVP event. And then send Hard Reset and Altert for this case.

>> If OVP occurred over re-try times (3 in default firmware), The Type-C port need plug out and in to resume Type-C Power Delivery negotiation.

c. When connecting Quick Charge / Apple Charge, Apple Charging is serving first. And then BC1.2 serials (BC1.2, QC2.0, QC3.0, AFC, and so on.)

d. You shall refer Type-C and Power Delivery SPEC to get details.

Best Regards,

Lisa