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In section 10.4.1 (Control of VBUS Provider Path and VBUS Consumer Path) of the Hardware Design Guidelines for the DRP Applications Using EZ-PD USB Type-C Controllers (AN210403), the circuitry shows a series of transistors without any list of specific components. What are the actual components for Q1, Q5, Q6, and Q16 on this page?
Thanks,
Hal
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USB EZ-PD Type-C
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Hi Hal,
Yes, the firmware for CYPD4225 is specific to the CY4541 EVK hardware and hence VBUS_P_CTRL_P1 is active high but VBUS_C_CTRL_N_P1 is active low. If you want these to be configured differently, please refer to config.h and pdss_hal.c files in the firmware as these are set using the pd_internal_pfet_on(), pd_inetrnal_cfet_on() APIs.
For CCG4M firmware examples, you could refer to the KBA since they arent included in the Host SDK.
Best Regards,
Sananya
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In addition, I've already reviewed the schematic and BOM for the CY4541 Daughter board (that uses the CYPD4225, also in the CCG4 family). Unfortunately, this design seems functionally different and more complex than the design in AN210403. In AN210403, VBUS_P_CTRL_P1 and VBUS_C_CTRL_P1 are both active high. In the CY4541 Daughter board design, VBUS_P_CTRL_P1 is active high and VBUS_C_CTRL_P1 is active low. And the CY4541 Daughter board schematic uses an additional transistor (Q15) due to the addition of the overcurrent protection as well as some other circuitry. Also, the BOM for the Daughter Board in this Guide is the BOM for the Base Board (just repeated).
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Hi Hal,
The App Note only includes a block diagram for the CCG4 DRP application and doesnt have any specific part recommendations. As you have already done, please refer to the MOSFET parts used in the CY4541 EVK to design your own board. The Kit User Guide does seem to repeat the same components for the daughter card so please refer to the actual daughter card BOM file from the EVK installation path- <install directory>\Cypress\CY4541 CCG4 EVK\1.0\Hardware\CCG4_DaughterCard_Rev04
You could follow the diagram in the App Note using these parts if you dont want the additional circuitry for OCP, dead battery etc.
Best Regards,
Sananya
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Hi Sananya,
Thanks for your reply - very helpful and informative. I didn't see the BOM for the Daughter board in that directory. Thanks for bringing it to my attention. And thanks for confirming that I can follow the circuitry in the block diagram from AN210403 but use the parts from this BOM.
One more question: as I mentioned, AN210403 describes VBUS_P_CTRL_P1 and VBUS_C_CTRL_P1 as both active high. But the schematic for the CY4541 Daughter board seems to indicate that VBUS_P_CTRL_P1 is active high but VBUS_C_CTRL_N_P1 is active low (from the addition of the "_N" in the signal name). Is the firmware that controls these signals different for the CYPD4225 from that in the CYPD4155?
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Hi Hal,
Yes, the firmware for CYPD4225 is specific to the CY4541 EVK hardware and hence VBUS_P_CTRL_P1 is active high but VBUS_C_CTRL_N_P1 is active low. If you want these to be configured differently, please refer to config.h and pdss_hal.c files in the firmware as these are set using the pd_internal_pfet_on(), pd_inetrnal_cfet_on() APIs.
For CCG4M firmware examples, you could refer to the KBA since they arent included in the Host SDK.
Best Regards,
Sananya