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USB EZ-PD™ Type-C

KiLe_4629881
Level 3
25 sign-ins 10 replies posted 10 questions asked
Level 3

Hi Cypress,  

We have a design that is using the CYPD5225 with TGL and a burnside bridge retimer on each port, however after the system exits S4/S5 after the first boot we cannot enumerate usb3/DP alt mode/thunderbolt unless we physically unplug/replug. 

This is based on the CYPD5225-96BZXI_notebook_tbt project based on sdk 3.4.0. 

After some discussion, we have a workaround of issuing a port reset command based on the system power state changes written to SYS_PWR_STATE register from the EC. (This was disabled on the project due to BC1.2 being disabled due to size requirements. 

So I shortened the callback handler for this in app.c app_update_sys_pwr_state to only trigger dpm_typec_command (i, DPM_CMD_TYPEC_ERR_RECOVERY, NULL); 

 

This fixes the issue of devices not being recognized after resume, however it will reset power to the device - which we want to avoid, as we cannot resume/hibernate etc without the device resetting. 

Is there a way to trigger only re-configuring the retimer/SOC on resume? 

I have noticed the following: 
It seems the SDK code monitors VSYS - and will trigger retimer_set_evt(param_1,RT_EVT_VSYS_ADDED); for each retimer when VSYS is restored. However in our design the retimer is on a different supply than the CCG5225 (which is always on). So I do not think this will get triggered. 

I tried to manually call this from our power state transition handler: 
retimer_set_evt(TYPEC_PORT_0_IDX,RT_EVT_VSYS_ADDED);  and RT_EVT_VSYS_REMOVED when we would enter/exit S0 (using the EC command handler app_update_sys_pwr_state)  for each port, however this does not seem to enable the alternate modes through the retimer. 

I did some additional digging and thinking, and I also wondered if the PD controller needs to notify the SOC to configure alt modes as well? perhaps through the call ridge_force_status_update or some other method? 

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4 Replies
ShifangZ_26
Moderator
Moderator 1000 replies posted 750 replies posted 500 solutions authored
Moderator

Hi, 

Recommend you have a define for SYS_PWR_STATE register,

#define SYSTEM_STATE_S0 (0)
#define SYSTEM_STATE_S3 (1)
#define SYSTEM_STATE_S4 (2)
#define SYSTEM_STATE_S5 (3)

And then, Adding below work around for case APP_EVT_TYPE_C_ERROR_RECOVERY:  and under if (!typec_only)

#if BB_RETIMER_ENABLE
/* Turn the retimer off after it's been written to */
CyDelayUs(10);
if(gl_system_state != SYSTEM_STATE_S0)
timer_start(port, APP_RETIMER_DISABLE_WAIT_TIMER, APP_RETIMER_DISABLE_DELAY, app_retimer_disable_cbk);
else
{
is_system_state_changed[port] = false;
retimer_disable(port);
}

#if INTEL_BB_RETIMER_HPI_CTRL_ENABLE
is_retimer_configured = false;
#endif
#endif /* BB_RETIMER_ENABLE */

 

Best Regards,

Lisa

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KiLe_4629881
Level 3
25 sign-ins 10 replies posted 10 questions asked
Level 3

Hi Lisa, 

Thanks for your response, 

I tried this, however none of these three items are defined in the SDK I have. 

app_retimer_disable_cbk 

is_system_state_changed

 

Also the symbol is_retimer_configured only builds for the backup firmware, it is undefined for the main firmware. 

--------------- Build Started: 03/31/2021 17:53:52 Project: CYPD5225-96BZXI_notebook_tbt, Configuration: ARM MDK Generic Release ---------------


ERROR: L6218E: Undefined symbol is_retimer_configured (referred from app.o). 

 

Maybe I should do what was done elsewhere in the firmware? 

retimer_disable (port, (gl_system_state != NB_SYS_PWR_STATE_S0)); 

Screenshot from 2021-03-31 17-48-19.png

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KiLe_4629881
Level 3
25 sign-ins 10 replies posted 10 questions asked
Level 3

@ShifangZ_26 do you have any other suggestions for resolving this? Since the current SDK is missing components you suggested to modify. 

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ShifangZ_26
Moderator
Moderator 1000 replies posted 750 replies posted 500 solutions authored
Moderator

Hello Kyle,

 

Recommend you contact local FAE/AE to get further support. Otherwise, you have to customize the firmware for S3 and S4 state based on SDK example code. 

Best Regards,

Lisa

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