TRAVEO™ T2G Forum Discussions

Hi Team,

Is there way through registers we can control the clock stabilization time of CYT2CL or as usual do we need to wait for some counts till the relevant ECO Register flag is updated.

Thanks,
Pradeep

dear infineon engineer or the strong community member I know a little about SPI, now i am do some experiment on SPI bus communication: my MCU is CYT2B73CAE I am using the demo example. under this path: D:\TVII_Sample_Driver_Library_6.4.0\tviibe1m\src\examples\scb\spi\Low_level_driver_master

D:\TVII_Sample_Driver_Library_6.4.0\tviibe1m\src\examples\scb\spi\Low_level_driver_slave

the master code running on one board the slave running on another same board. 

i heard of some theroy that when start communication the need to pull chip selection pin low ,when transmit finished the pull it high. 

the question is: in the demo code seems no code to do this.

the master i check the clk and the mosi seems right, while the connected mosi got nothing , what's more the chip select pin is always about 3V. 

where am i wrong. is there any detail doc about the spi demo. 

the master code can enter in the cyclic write data operation and run in to irqSCB. but get nothing from  the slave. the code i am not modified, the spi relate pin is checked.

do i need to manually op the chip select pin, how can i got data smoothly from slave and run the demo normally.

Hi Team,

Is it possible to pre-empt the sys-tick by other interrupts like DMA through any register settings in CYT2CL?

Thanks,
Pradeep