TRAVEO™ T2G Watchdog Debug Mode: Counter is stopped only when a debugger is connected and the CPU is halted during a breakpoint.

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Changjiang
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According to TRAVEO™ T2G Automotive Body Controller Entry Family Architecture Technical Reference Manual (TRM) 20.6 Debug Mode, Table 20-5. Debug Modes: When configure DEBUG_RUN to 0 and DEBUG_TRIGGER_ENABLE to 1, watchdog counter is stopped only when a debugger is connected and the CPU is halted during a breakpoint.

Table 20-5. Debug Modes.png

However, the watchdog counter does not stop when a debugger is connected and the CPU is halted during a breakpoint.

It seems that to pause at a breakpoint while debugging, need configure the trigger matrix to connect the related CPU halted signal to the trigger input for the related watchdog timer:

Untitled.png

Could you kindly help to share how to configure the trigger matrix to connect the related CPU halted signal to the trigger input for the related watchdog timer?

Thanks very much!

 

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yanf
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Hi Changjiang,

Sorry for keeping you waiting. I'm now having a tested solution for you.

To issue the CPU halt signal, the CTI needs to be configured. To do so, you may use the codes below,

#define TRC_CTICONTROL (*((volatile uint32_t*)(0xE0080000)))
#define TRC_CTIINTACK (*((volatile uint32_t*)(0xE0080010)))
#define TRC_CTIINEN(n) (*((volatile uint32_t*)(0xE0080020 + 4 * n)))
#define TRC_CTIOUTEN(n) (*((volatile uint32_t*)(0xE00800A0 + 4 * n)))

#define CM4_CTICONTROL (*((volatile uint32_t*)(0xE0042000)))
#define CM4_CTIINTACK (*((volatile uint32_t*)(0xE0042010)))
#define CM4_CTIINEN(n) (*((volatile uint32_t*)(0xE0042020 + 4 * n)))
#define CM4_CTIOUTEN(n) (*((volatile uint32_t*)(0xE00420A0 + 4 * n)))

#define DEBUG_HALT_CM4

#ifdef DEBUG_HALT_CM0
TRC_CTIINEN(0) = 0x1;
TRC_CTICONTROL = 0x1;
TRC_CTIOUTEN(6) = 0x1;
#else   // DEBUG_HALT_CM4
CM4_CTICONTROL = 0x1;
CM4_CTIINEN(1) = 0x1;
CM4_CTIOUTEN(1) = 0x1;
TRC_CTICONTROL = 0x1;
TRC_CTIINEN(4) = 0x1;
TRC_CTIOUTEN(6) = 0x1;
#endif

* Running on the CM4 core of the CYT2B7

After adding these codes into previous source file, the watchdog will stop now in the case of debug halt.

Best Regards,

Finn

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yanf
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Hi Changjiang,

I am trying to solve this but I personally encounter some problems too.

Generally speaking, to connect the CPU halted signal to WDT, you need to use trigger mux. You can refer to the datasheet Chapter 16 for how they are connected. 

I was assuming that the CPU halt signal would come from  CTI_TR_OUT (located in CPUSS)  through MUX group 9 to TR_GROUP8_INPUT1.     Consecutively, TR_GROUP8_INPUT1 signal is refered as TRIG_IN_MUX_8_TR_GROUP9_OUTPUT0. TRIG_IN_MUX_8_TR_GROUP9_OUTPUT0 goes through MUX group 8 to  SRSS_WDT_DEBUG_FREEZE_TR_IN.  As the following figure shows.

yanf_0-1638519493133.png

The codes to implement it are

Cy_TrigMux_Connect(TRIG_IN_MUX_9_CTI_TR_OUT0, TRIG_OUT_MUX_9_TR_GROUP8_INPUT1,CY_TR_MUX_TR_INV_DISABLE,TRIGGER_TYPE_LEVEL,0);


Cy_TrigMux_Connect(TRIG_IN_MUX_8_TR_GROUP9_OUTPUT0, TRIG_OUT_MUX_8_SRSS_WDT_DEBUG_FREEZE_TR_IN,CY_TR_MUX_TR_INV_DISABLE,TRIGGER_TYPE_LEVEL,0);

 

However, even these codes have been added. The WDT counter did not stop. I need to further investigate the reasons for this. Thanks for your patience while waiting.

Best Regards,

Finn

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yanf
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50 replies posted 50 sign-ins 25 solutions authored

Hi Changjiang,

Sorry for keeping you waiting. I'm now having a tested solution for you.

To issue the CPU halt signal, the CTI needs to be configured. To do so, you may use the codes below,

#define TRC_CTICONTROL (*((volatile uint32_t*)(0xE0080000)))
#define TRC_CTIINTACK (*((volatile uint32_t*)(0xE0080010)))
#define TRC_CTIINEN(n) (*((volatile uint32_t*)(0xE0080020 + 4 * n)))
#define TRC_CTIOUTEN(n) (*((volatile uint32_t*)(0xE00800A0 + 4 * n)))

#define CM4_CTICONTROL (*((volatile uint32_t*)(0xE0042000)))
#define CM4_CTIINTACK (*((volatile uint32_t*)(0xE0042010)))
#define CM4_CTIINEN(n) (*((volatile uint32_t*)(0xE0042020 + 4 * n)))
#define CM4_CTIOUTEN(n) (*((volatile uint32_t*)(0xE00420A0 + 4 * n)))

#define DEBUG_HALT_CM4

#ifdef DEBUG_HALT_CM0
TRC_CTIINEN(0) = 0x1;
TRC_CTICONTROL = 0x1;
TRC_CTIOUTEN(6) = 0x1;
#else   // DEBUG_HALT_CM4
CM4_CTICONTROL = 0x1;
CM4_CTIINEN(1) = 0x1;
CM4_CTIOUTEN(1) = 0x1;
TRC_CTICONTROL = 0x1;
TRC_CTIINEN(4) = 0x1;
TRC_CTIOUTEN(6) = 0x1;
#endif

* Running on the CM4 core of the CYT2B7

After adding these codes into previous source file, the watchdog will stop now in the case of debug halt.

Best Regards,

Finn

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Changjiang
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Hi Finn,

Thanks very much for your kind support!

 

Unfortunately it seems that the watchdog counter still does not stop when halting.

 

Please find the corresponding memory value and register configuration:

Changjiang_0-1641542090180.png

Changjiang_1-1641542385790.png

 

 

Changjiang_3-1641542450769.png

 

Maybe there is something wrong with with the configuration? OR need set the configuration for both CM0+ and CM4?

 

Best Regards,

Changjiang

 

 

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yanf
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Hi Changjiang,

The watchdog counter is shown in the WDT_CNT register. You should check this register.

From my inspection, the counter increases ~1687 each time I execute a delay  (Cy_SysTick_DelayInUs(50000ul);) no matter how long the CPU waits in halt state. This means the counter is stopped in CPU halt state.

yanf_0-1641778972976.pngyanf_1-1641778992977.png

 

Can you check your WDT_CNT register instead of a memory location? If that's not correct, can you share the relevant part of your codes so that I can do further checks for you.

Best Regards,

Finn

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Hi Finn,

 

Thanks very much for your feedback and sorry for the late reply.

YES. I know WDT_CNT is the register to check. The memory value and register configuration is just to make sure that the corresponding configuration is correct.

What I checked is as following:

After watchdog is configured and enabled during debug,  halt the program and check the WDT_CNT.

The result is: Even the program is halted during debug, the WDT_CNT value still increments to the UPPER_LIMIT.

Please find the relevant example project based on IAR Embedded Workbench for Arm in the attachment.

 

Thanks very much for your kind support!

 

Best Regards,

 

Changjiang

 

 

 

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yanf
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Hi Changjiang,

When I unzipped your project file and compiled it, I got 5 errors so I can not actually test it on my board.

yanf_0-1642042110661.png

I checked your code manually without compiling and found that you didn't add below codes into your main.c function, which I mentioned in my first response.

Cy_TrigMux_Connect(TRIG_IN_MUX_9_CTI_TR_OUT0, TRIG_OUT_MUX_9_TR_GROUP8_INPUT1,CY_TR_MUX_TR_INV_DISABLE,TRIGGER_TYPE_LEVEL,0);

Cy_TrigMux_Connect(TRIG_IN_MUX_8_TR_GROUP9_OUTPUT0, TRIG_OUT_MUX_8_SRSS_WDT_DEBUG_FREEZE_TR_IN,CY_TR_MUX_TR_INV_DISABLE,TRIGGER_TYPE_LEVEL,0);

 

You need to configure both trigger mux and CTI register. So you need these codes. Please add them and try again.

 

Best Regards,

Finn

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yanf
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To clarify, CTI register controls the issuing of halt signals while trigger mux routes the signal to notify watchdog. Both of them are needed.

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Hi Finn,

 

Thanks very much for your explanation.

It works (The watchdog timer counter is stopped only when a debugger is connected and the
CPU is halted during a breakpoint) after adding  following statements

Cy_TrigMux_Connect(TRIG_IN_MUX_9_CTI_TR_OUT0, TRIG_OUT_MUX_9_TR_GROUP8_INPUT1,CY_TR_MUX_TR_INV_DISABLE,TRIGGER_TYPE_LEVEL,0);

Cy_TrigMux_Connect(TRIG_IN_MUX_8_TR_GROUP9_OUTPUT0, TRIG_OUT_MUX_8_SRSS_WDT_DEBUG_FREEZE_TR_IN,CY_TR_MUX_TR_INV_DISABLE,TRIGGER_TYPE_LEVEL,0);

 

Another strange behavior is: It is normal to run in Debug mode. However, it will report precise data access error at data address 0xe0042000 (0xe0042000 is the address of CM4_CTICONTROL and the error happens after CM4_CTICONTROL = 0x1;) during standalone normal run without debugger.

The following screenshot is based on Attach to the running target:

Changjiang_0-1642410101045.png

 

Does the address 0xe0042000 have some access limitation (Such as can only be accessed during debug mode?

 

Thanks very much!

 

Best Regards,

 

Changjiang

 

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yanf
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Hi Changjiang,

Glad to hear that the last problem is solved!

For your second question, I'm not sure what you're trying to do. To my understanding, "standalone normal run without debugger" means the MCU runs without a debugger connected, right? Then how do you get the hardFault error message in IAR, where they are not connected.

I used another method to test what you claimed. I put an endless for loop at the end of my codes, after all the settings and initializations finished. In this for loop, I make the LED flash. And I can see the LED flashing all the time, which means the all the initializations including CM4_CTICONTROL = 0x1; has successfully finished.

 

Best Regards,

Finn

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Hi Finn,

 

To my understanding, "standalone normal run without debugger" means the MCU runs without a debugger connected, right? 

YES. Your understanding is right. 

 

Then how do you get the hardFault error message in IAR, where they are not connected.

We can get the HardFault error information by  "Attach to the running target" (Just connect the debug probe with target and check the MCU status without downloading).

 

I uploaded my example project where I want to turn on LED4 after CM4_CTICONTROL = 0x1; This works OK during Debug mode while NOK during standalone run mode.

 

Thanks very much for your kind support!

 

Best Regards,

 

Changjiang

 

 

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yanf
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Hi Changjiang,

Your project can not be complied due to the errors that are shown below. Thus it can not be downloaded and tested.

yanf_0-1642488564611.png

 

Please check the other parts of your codes. Try to create a new project which contains solely the CTI and WDT configuration codes. I had no problems here, no matter using debug run or attaching to running target or completely standalone.

Best Regards,

Finn

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Hi Finn,

 

Sorry for the inconvenience! But the project can be compiled successfully after download on my computer.

 

By the way, your screenshot about the error is not clear and I can not pinpoint the error.

 

Best Regards,

 

Changjiang

 

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yanf
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Hi Changjiang,

 I think I have solved the last 5 errors by selecting correct device. I found that the device was set to default Cortex M0 instead of Traveo-II CYT2B7.

But not I get more errors. It seems you used some functions that have been declared but not defined.

Error[Li005]: no definition for "__ecc_init_sram_start_address" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\startup\startup.o]
Error[Li005]: no definition for "__ecc_init_sram_end_address" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\startup\startup.o]
Error[Li005]: no definition for "Cy_Crypto_Init" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\main_cm4.o]
Error[Li005]: no definition for "Cy_Crypto_Enable" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\main_cm4.o]
Error[Li005]: no definition for "Cy_Crypto_Crc_Init" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\main_cm4.o]
Error[Li005]: no definition for "Cy_Crypto_Sync" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\main_cm4.o]
Error[Li005]: no definition for "Cy_Crypto_Crc_Run" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\main_cm4.o]
Error[Li005]: no definition for "__checksum" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\main_cm4.o]
Error[Li005]: no definition for "__checksum_end" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\main_cm4.o]
Error[Li005]: no definition for "__checksum_begin" [referenced from C:\Users\YanF\Downloads\tviibe1m (1)\tviibe1m\cm4\Debug\Obj\src\main_cm4.o]

 

Best Regards,

Finn

 

 

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Hi Finn,

 

I think my example project is based on a higher IAR tool than yours.

I have updated to use IAR tool 9.10.2 for the project in the attachment. 

Hope this version will work for you.

 

You can use Project-> Attach to Running Target to get the error information.

 

Sorry for the inconvenience and thanks very much for your kind support!

 

Best  Regards,

Changjiang

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yanf
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Hi Changjiang,

I have successfully complied and download your project. But I found when I attach to running target, the PC is pointing to the middle of nowhere.

 Screenshot (74).png

No hardFault reported but the code is stuck.

There are too many functions in your project which are irrelevant to the WDT and CTI. So I copied them out from your project to make a new project. Please find the attached project.

This project uses the code copied out from your project and is tested without any problem. When attach to running target, it is found that PC is pointing to the endless for loop located at the end of main function.

Best Regards,

Finn

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yanf
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Please use the config "rev_d"

I forgot to set debug_trigger_en to 1. You may add it.

BR,

Finn

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