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TRAVEO™ II

zhimin
New Contributor

Hi,

I'm using flash driver to erase sector 0x100B 8000 of MCU CYT2BL8C, the flash driver runs from RAM 0x0800 2000.

After an IPC NOTIFY event written to IPC1 register, on M0+ site, a hard fault is immediately detected.

I'm not clear the reason causing this situation. Does this have something to do with the protection context(PC)? How could I find in which PC is the current code executing?

Does anyone have any ideas about this case?

thank you in advance.

Best Regards,

Zhimin

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1 Solution
zhimin
New Contributor

Hi Ashish,

I think this issue is related to a "code in RAM" problem. After I remap the code, that is executing in CMO during flash operation, to RAM, the flash operation issue is solved.

thank you for your info.

BR,

Zhimin

View solution in original post

2 Replies
Ashish
Moderator
Moderator

Hi Zhimin,

Sorry for delay. There could be multiple reasons for hard fault, and Protection violation could also be one of them. Each bus master has an PROT_MPUx_MS_CTL.PC[3:0] protection context field. This is used as the protection context attribute for all bus transfers that are initiated by the master. You can refer this register for active protection context (PC). For further details on Protection Context, kindly refer  Architecture TRM (section 6.3- Protection Context, 6.4 Protection structure). If this does not help, you may give us more details, like screenshot on where it's stopped in debugger, and CPU status register value, PC register value and Fault struct register values to help further debug this issue.

 

Thanks,

Ashish

0 Likes
zhimin
New Contributor

Hi Ashish,

I think this issue is related to a "code in RAM" problem. After I remap the code, that is executing in CMO during flash operation, to RAM, the flash operation issue is solved.

thank you for your info.

BR,

Zhimin

View solution in original post