Established or measured an error rate for the PUART interface on the CYW20719?

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MichaelF_56
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Team,

I'm working with a customer using the 20719 within an application that is extremely sensitive errors and re-transmission.

Per the blog RanjithK_41​ created here: CYW20719 and CYW20735 Peripheral and HCI UARTs

The PUART on the 20719 will operate up to 3Mb/s max. However, they want to understand whether or not there is an associated error rate which needs to be calculated in order to assess actual throughput and potential for re-transmission of data.

As an example, the STM32 MCU documents a 1.73% error rate on its 3Mb/s UART, so they want to understand if our UART implementation is similar.

Thanks in advance for your help.

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BoonT_56
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In the 20706 datasheet, there is a chart (Table 2) displaying the error rates for the various baud rates. I noted that this chart was absent in the 20719 datasheet. There is another statement saying that if the combined baud rate error of the device and host is within +/- 5%, then the device (20719) operates correctly. Is this what you are looking for?

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BoonT_56
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In the 20706 datasheet, there is a chart (Table 2) displaying the error rates for the various baud rates. I noted that this chart was absent in the 20719 datasheet. There is another statement saying that if the combined baud rate error of the device and host is within +/- 5%, then the device (20719) operates correctly. Is this what you are looking for?

Zhengbao_Zhang
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and  if we are using a 24M clock , the baud error rate is in this table.

So if the other side baud rate is within %5 fluctuate , interface communication will be correct always.

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