BCM20736 Sleep/Low Power and GPIO P0

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hachc_2293006
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Hello team,

In our design , we use P0/P1/P8/P32 as ADC input and Pull resistance to each pin of value 33K to Vcore (Vcore is active during Sleep).

When processor enters Sleep mode, Low power current is around ~500uA.

But when we isolate GPIO P0, from the pull up, then low power current drops to ~50-60 uA

Could any suggest, what could be reason?

Why P0 seems to leak current?

Any recommended configuraiton ?

THanks nad regards,

hari

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BoonT_56
Employee
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There are no special requirement on P0 although some folks here suggested a 10K pull-up. Did you still see this is deep-sleep?

GPIO Settings to achieve low power consumption during sleep

GPIO state in deep sleep

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1 Reply
BoonT_56
Employee
Employee
500 likes received 250 likes received 100 likes received

There are no special requirement on P0 although some folks here suggested a 10K pull-up. Did you still see this is deep-sleep?

GPIO Settings to achieve low power consumption during sleep

GPIO state in deep sleep