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SRAM

Anonymous
Not applicable

I have to design a system that has some memory (around 32K bytes) shared between an 8051 family microprocessor (actually an 80C320) and an ARM. Both processors must be able to read and write the memory at the same time, hopefully without any complicated synchronization system. It seems the CY7C007 may be a good way of doing this. Has anyone done anything ike this? Is there any information available on the design needed to interface the CY7C007 to an 8051 micro or an ARM?

   

Is it as simple as this? I.e. each processor can just read or write locations in shared memory any time it wants, without worrying about what the other processor is doing? Are there any types of conflict or collision that must be avoided?

   

Thanks - Rowan

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1 Solution
Anonymous
Not applicable

Hi Rowan,

   

You could look at either CY7C027 or CY7C009.

   

These devices have arbitration mechanism to resolve conflicts when the two hosts attempt to access the same location. You could refer to the datasheets for these devices available on our website to understand this feature.

   

Most applications for our Dual Port RAM's are actually like what you have explained. Two processors accessing a chip through the two ports.

   

Hope this helps.

   

Thanks,

   

-Anuj

View solution in original post

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1 Reply
Anonymous
Not applicable

Hi Rowan,

   

You could look at either CY7C027 or CY7C009.

   

These devices have arbitration mechanism to resolve conflicts when the two hosts attempt to access the same location. You could refer to the datasheets for these devices available on our website to understand this feature.

   

Most applications for our Dual Port RAM's are actually like what you have explained. Two processors accessing a chip through the two ports.

   

Hope this helps.

   

Thanks,

   

-Anuj

View solution in original post

0 Likes