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JeCo_264681
Level 5
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Why do I get this message when I try to do a DMA Wizard on DMA_1 ? The build file is attached. Where should I actually paste these lines?  I have tried various places and they get optimized out of existence when I do a Clean and Build.

   

I am trying to use the sequencing SAR to put analog data into the FIR filter where I will do a time-align on the two input channels. A secondary question is: how do I be sure that the next ADC starts with ADC_SAR input 0?  I have to keep them time aligned.  But this is a secondary question. Go back up to the first paragraph for my primary question. Why do I get the message below from the DMA Wizard and what do I do with it?  My Workspace bundle is attached.

   

/* Variable declarations for DMA_1 */

   

/* Move these variable declarations to the top of the function */

   

uint8 DMA_1_Chan;

   

uint8 DMA_1_TD[2];

   

 

   

/* DMA Configuration for DMA_1 */

   

#define DMA_1_BYTES_PER_BURST 2

   

#define DMA_1_REQUEST_PER_BURST 1

   

#define DMA_1_SRC_BASE (CYDEV_PERIPH_BASE)

   

#define DMA_1_DST_BASE (CYDEV_PERIPH_BASE)

   

DMA_1_Chan = DMA_1_DmaInitialize(DMA_1_BYTES_PER_BURST, DMA_1_REQUEST_PER_BURST, 

   

    HI16(DMA_1_SRC_BASE), HI16(DMA_1_DST_BASE));

   

DMA_1_TD[0] = CyDmaTdAllocate();

   

DMA_1_TD[1] = CyDmaTdAllocate();

   

CyDmaTdSetConfiguration(DMA_1_TD[0], 2, DMA_1_TD[1], DMA_1__TD_TERMOUT_EN | TD_INC_DST_ADR | TD_AUTO_EXEC_NEXT);

   

CyDmaTdSetConfiguration(DMA_1_TD[1], 2, DMA_1_TD[0], DMA_1__TD_TERMOUT_EN | TD_INC_DST_ADR);

   

CyDmaTdSetAddress(DMA_1_TD[0], LO16((uint32)ADC_SAR_Seq_SAR_SAR_WRK0_PTR), LO16((uint32)Filter_STAGEA_PTR));

   

CyDmaTdSetAddress(DMA_1_TD[1], LO16((uint32)ADC_SAR_Seq_SAR_SAR_WRK0_PTR), LO16((uint32)Filter_STAGEB_PTR));

   

CyDmaChSetInitialTd(DMA_1_Chan, DMA_1_TD[0]);

   

CyDmaChEnable(DMA_1_Chan, 1);

   
        
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1 Solution
ETRO_SSN583
Level 9
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Level 9

Its setup code, with globals, or you can use it in a startup function.

   

 

   

    

   

          

   

http://www.cypress.com/?rID=37793     AN52705     Getting Started with DMA

   

http://www.cypress.com/?rID=82680     AN84810     PSoC® 3 and PSoC 5LP Advanced DMA Topics

   

http://www.cypress.com/?rID=44335     AN61102 PSoC® 3 and PSoC 5LP - ADC Data Buffering Using DMA

   

http://video.cypress.com/video-library/search/dma/     Videos on DMA

   

https://www.youtube.com/results?search_query=dma+psoc Videos on DMA (some overlap)

   

 

   

 

   

From AN52705

View solution in original post

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ETRO_SSN583
Level 9
5 likes given 1000 replies posted 750 replies posted
Level 9

Its setup code, with globals, or you can use it in a startup function.

   

 

   

    

   

          

   

http://www.cypress.com/?rID=37793     AN52705     Getting Started with DMA

   

http://www.cypress.com/?rID=82680     AN84810     PSoC® 3 and PSoC 5LP Advanced DMA Topics

   

http://www.cypress.com/?rID=44335     AN61102 PSoC® 3 and PSoC 5LP - ADC Data Buffering Using DMA

   

http://video.cypress.com/video-library/search/dma/     Videos on DMA

   

https://www.youtube.com/results?search_query=dma+psoc Videos on DMA (some overlap)

   

 

   

 

   

From AN52705

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ETRO_SSN583
Level 9
5 likes given 1000 replies posted 750 replies posted
Level 9

The below image did not paste in last post. See attached.

   

 

   

Note your mic interface should eliminate coupling cap, that will

   

allow bias source to bias up the PGA into ~ center of CM range.

   

2.5 V would have nailed it.

JeCo_264681
Level 5
100 replies posted 50 replies posted 25 replies posted
Level 5

 Ah, yes, danaknight. I found the answer there in AN52705 on page 7 and Appendix A.  I paste the wizard code into main.c. Page 7 explains that the wizard does not support all peripherals so we have to do some editing to define the parameters. Thanks.

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ETRO_SSN583
Level 9
5 likes given 1000 replies posted 750 replies posted
Level 9

Glad to have been of assistance.

   

 

   

Regards, Dana.

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