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JeCo_264681
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 Attached is my project. I want the code in main{ } to execute after the DMA_Ch_A and DMA_Ch_B filter channels are complete. My two filter DMA TDs load 2040 samples into each memory location. The interrupts are named isr_dma_A and isr_dma_B.  I declared two volatile unit8 Done flags as global variables but I cannot find any Done flags in the build workspace.  What flag will be set by the ISRs when transfer to memory arrays is complete?

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Bob_Marlowe
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When posting a project please use Creator -> File -> Create Workspace Bundle and attach the resulting .zip-file. I cannot open your project right now.

   

 

   

Bob

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Bob_Marlowe
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When posting a project please use Creator -> File -> Create Workspace Bundle and attach the resulting .zip-file. I cannot open your project right now.

   

 

   

Bob

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HeLi_263931
Level 8
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You need to set these flags manually. The default ISR is just empty.

Bob_Marlowe
Level 10
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Thanks to hli I now understand your question.

   

The isr-component is just a placeholder to handle an interrupt, so that you do not have to mess around with interrupt controllers or other core hardware. But the isr component has to be initialized. My preferred method is

   

 

   

CY_ISR_PROTO(MyHandler);    // Declare prototype of my interrupt handler

   

CY_ISR(MyHandler)    // interrupt handler

   

{

   

    // Do what needed, ie set flags

   

    // Do not forget to remove the cause of the interrupt

   

}

   

 

   

and later the initialization:

   

    isr_StartEX(MyHandler);

   

 

   

Bob

JeCo_264681
Level 5
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Level 5

 Sorry about that, Bob. I have attached the zip file in case you want to comment further. I'll take a look at the other answers and see if I can figure it out. Stay tuned.  I'll close the question after I tinker with it. Thans.

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Bob_Marlowe
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I commented your code, look for "//**Bob"

   

 

   

Bob

JeCo_264681
Level 5
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Level 5

 Thank you, Bob.  I have moved your code suggestions into my project and it builds fine.
I like how you #define forever = TRUE.  Kinda like the old song "love forever true."  I do get an Information message that my pin with bypass capacitor on P0[4] is not connected.  It is locked to P0[4] pin 53 on the chip  in the cydwr, though.  If there is anything else I should do on that pin, let me know.  Otherwise, over and out.

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Bob_Marlowe
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In your schematic you must remove the Pin1!! That is a real pin and its settings will conflict with the settings for the bypass cap.

   

 

   

Bob

JeCo_264681
Level 5
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Level 5

 So I eliminate Pin_1 and just connect the bypass capacitor between P0[4] and ground! and don't bother to tell PSoC Creator about it, right?  I only ask because the SAR seq data sheet says the pin should be a high impedance input. Maybe that's what it is by default.

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ETRO_SSN583
Level 9
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An analog pin is by default Hi-Z. I would, however, encourage you

   

always to look at a components setting vs rely on memory what

   

settings default to.

   

 

   

Regards, Dana.

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JeCo_264681
Level 5
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 Thank you DanaKnight. When I don't force any pin to be the bypass, the build selects P0[2] opamp+ and labels it ADC_SAR_Seq:SAR_Bypass. So that looks like the natural choice for the bypass capacitor. Thank you all for the help. Over and out.

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