WaveDAC8 component not released in 2.1, one can speculate, like a number of
other components, that work on its functionality not complete, so not an "official"
module release yet for primetime.
If you want to "roll" your own, so's to speak, you simply fill a table with a periods
worth of waveform samples, and DMA it to a VDAC. Thats easy, and you can
fill the table with sine, cosine, ramp, tri, square, sin(x), sin(x)/x.....anything you
More sophisticated, is burst N cycles of waveform, with a programmable delay in between. Many
of todays programmable waveforms can be built. Because of VDAC settling time you are limited to ~
1 Mhz sample rate. If you use IDAC, its ~ 100 nS. So if sample table size is 20 samples, max freq for
VDAC is 50 Khz.
Some DDS reference material that might be of help -
Go to their website, much more ref material.
One more set of comments on DDS waveform generation.
1) Jitter is related to not only the clock, but other interrupt related processes. So if
you use a timer, to set sample rate, with an ISR, you need to be concerned with jitter
of clock, and ISR machine behaviour and priority.
2) Table depth controls waveform "fidelity", reproduction, hence harmonic distortion.
There is at least one paper, to the best of my limited knowledge, in IEEE archives, that
discusses this. Not public domain unless you are a member. I have used 32 entry sine
tables, and on a spectrum analyzer they are close to 40 db down on harmonics. Larger
table size diminishing returns/bit. As to be expected. I will go out on a limb and state you
are not going to get 60 db perfromance in a PSOC solution. Unless lots of external filtering.
3) PSOC limited to 8 bit DAC, unless you resort to other techniques, like bit dithering, PWM generation,
etc.. Translate even lower max frequency generation capabilities.