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ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

Suggestion for input pin options, both analog and digital,

   

offer a setting that biases the input to Vdd/2. This is to

   

facilitate AC coupling of either digital or analog signals.

   

 

   

Of course this has impact on power, eg under certain situations,

   

pin left floating, input structure would draw current, both the divider

   

and the N-P CMOS input transistors.

   

 

   

Regards, Dana.

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