Psoc 5LP Counter V3.0 semi defective in one shot mode.

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abajor
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I'm using some software enable counters in One Shot mode to create trigger pulses of a specific duration.

I have a situation where I need to trigger a camera array, then move a microscope stage in the Z axis. To accomplish this I'm using an ISR which checks for a Camera ready signal.  the ISR switches the output for a demux and then resets the counter to  generate a pulse.

Because the camera ready signal takes 100us to go false after it is triggered, I also needed to use a second counter to generate a signal to block the ISR from entering prematurely.

While setting this up I discovered a strange issue where the reset pin of the counter is set low, I call the Counter_Start(); function, and the counter is frozen.

One WOULD assume that when you call the Counter_Start(); function on the software enabled counter, that it SHOULD start counting then stop with TC high.  Instead it does nothing, it's not even defaulted to TC high, which would be very helpful for automation.

This cannot be how this counter is intended to work. If it is WHY? The only way I can get the counter to start, is to send a pulse to the reset pin.  This isn't a big deal for the counter reset by a control register from the ISR, I can simply toggle the control register on start up to prime the counter; however, I need to add an or gate and another control register to prime my other one shot counter.

This adds extra complexity and utilizes resources unnecessarily .

Is this something that is being addressed?  A Start() function should "Start" the counter.

 

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Hello.

I tested the one-shot mode and it works as documented.  I think you have a different perception of how you'd like it to work.

I also tried multiple calls to Start, but that only triggers the one-shot the very first time.  After that, Start would not trigger the one-shot again.

In the Counter component datasheet, it's says:
The reset input is used to reset the control register in PSoC 3, PSoC 4, and PSoC 5LP counter implementations, and also to implement the One-Shot Run Mode feature.
UDB one-shot mode needs a reset pulse in order to start counting. If the Counter is only run in one-shot mode from power up, it will not start counting until reset is applied and removed.

So, your observation of needing a reset pulse (from a Control Register), is correct. This is a requirement to trigger the one-shot counter counting.  BTW, I configured Control_Reg for pulse mode, so it only requires a single write to it.

I totally agree with you though, it's far more intuitive to think we could use Start to trigger the one-shot, but that's not how it was implemented.  Oh well.

I also tried Stop followed by Start, but to no avail.  There is definitely something in the UDB logic that needs a hard RESET, something that Start/Stop/Init/Enable does not accomplish.

Good luck with you project.  It sounds interesting.

edit:
I put together a monostable using the Counter component where it is run in continuous mode, and configured to not reload.  In order to reload, I used the Init function followed by Start.  This way, you can eliminate the Control Reg.  LED_1 will provide the active high pulse of whatever duration you require.  See attachment.  Ignore the Control Reg in schematic.  It was only for testing, as is the SW_1.

I'm sure you're familiar enough  with the Counter component to modify the constants to suit your application.  And, it only cost an SR flip-flop and an extra line in s/w for the Init.

 

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Ekta_N
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Hello @abajor 

I am attaching a reference project in which I have configured the timer in oneshot mode (up counter). In the Schematic I have connected an output pin (LED on the kit CY8CKIT-059) to the terminal count output. As the terminal count is reached I observe the LED on the board to blink once.  

Ekta_0-1640167409177.png

Can you please try loading the attached project and let me know if you make the same observations?

As per my understanding from your explanation you do not observe any activity on the terminal count pin when the terminal count is reached. Could you please confirm if my understanding of the issue is correct?

In case the issue persists  kindly attach your project with your response so that I can check if the timer is configured correctly. 

Best Regards
Ekta

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abajor
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Sorry I'm getting back to this just now.

Again your example, uses reload counter on TC. I don't want to reset counter on TC.

As far as I can tell it never starts the counter until I reset it using a control register.  I have found no explanation for why the counter doesn't actually Start and reach it's terminal count.  I will try to make a test schematic which pings the counters value after using the Start() method, and sleeping main for longer than the count period.

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Hello.

I tested the one-shot mode and it works as documented.  I think you have a different perception of how you'd like it to work.

I also tried multiple calls to Start, but that only triggers the one-shot the very first time.  After that, Start would not trigger the one-shot again.

In the Counter component datasheet, it's says:
The reset input is used to reset the control register in PSoC 3, PSoC 4, and PSoC 5LP counter implementations, and also to implement the One-Shot Run Mode feature.
UDB one-shot mode needs a reset pulse in order to start counting. If the Counter is only run in one-shot mode from power up, it will not start counting until reset is applied and removed.

So, your observation of needing a reset pulse (from a Control Register), is correct. This is a requirement to trigger the one-shot counter counting.  BTW, I configured Control_Reg for pulse mode, so it only requires a single write to it.

I totally agree with you though, it's far more intuitive to think we could use Start to trigger the one-shot, but that's not how it was implemented.  Oh well.

I also tried Stop followed by Start, but to no avail.  There is definitely something in the UDB logic that needs a hard RESET, something that Start/Stop/Init/Enable does not accomplish.

Good luck with you project.  It sounds interesting.

edit:
I put together a monostable using the Counter component where it is run in continuous mode, and configured to not reload.  In order to reload, I used the Init function followed by Start.  This way, you can eliminate the Control Reg.  LED_1 will provide the active high pulse of whatever duration you require.  See attachment.  Ignore the Control Reg in schematic.  It was only for testing, as is the SW_1.

I'm sure you're familiar enough  with the Counter component to modify the constants to suit your application.  And, it only cost an SR flip-flop and an extra line in s/w for the Init.

 

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abajor
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I'll take a look at how this runs on my PSoC, but one major difference is I do not reset my counter on TC. I only use the reset pin to reload my counters since I am inverting TC to generate a pulse with a well defined period.

In my other counter I am relying on TC being high to allow my ISR to be entered, not the interrupt on the counter. I need this counter to compensate for the 100us lag in my "Camera Ready" signal, if I don't my ISR enters prematurely and causes an image to be captured as the stage is moving.

So this test code may not illustrate the bug that I am having.

Using reload counter on reset only, appears to leave the counter stuck with TC low even after running Start(). I must directly intervene sending a hi low signal from a control register to get the counter to run for the first time.

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