PSoC Today: USB / PSoC 3 pulse generator project and source code

[Anonymous]

In an attempt to get these projects out the world at large, I have decided to post them to the community components forms.  Again, not specifically a component, this is the USB function generator application.  Source is included for the C# application as well as the PSoC 3 project.  Extra information is also included in the zip archive.

       

This memo includes a PC based function generator, implemented on a PSoC 3 and controlled via a PC App over USB. The function generator app:

   

 Allows complete control over a dual output 16 bit PWM running at up to 66 Mhz.

   

 The PWM clock divider, PWM period, compare1 and compare2 values, and compare modes (LT, LTE, GT, GTE, E) can all be controlled via the App.

   

 Each output can be enabled or disabled independently, or the entire PWM can be disabled.

   

 The second channel‟s compare value can be slaved to the first channel.

   

 The duty cycle can be locked so you can change the frequency without worrying about changing the compare value.

   

 An optional duty cycle limit can be imposed (10% - 90%) on the compare values (preventing full on or full off, a useful safety feature when driving a switching regulator).

   

 The output can be dynamically switched between GPIO (P0[0] and P0[1]) or SIO pins (P12[0] and P12[1])

   

 When using the SIO, the output voltage can be either VDDIO or a variable voltage set by an adjustable DAC controlled via the application.

   

 Each output pin‟s drive mode can also be changed via the app: Strong, open drain drives low, open drain drives high, resistive pull up, resistive pull down, and resistive pull up/down can all be used.

   

A big thanks to RLRM‟s generic USB HID app note. It was his simplified USB example that made this possible.

[Anonymous]

 And for fun, here are the related PSoC today videos:

       

http://www.youtube.com/watch?v=WqmIJSJ_Kt8&list=UUOPwgpx4mNwPULlfdCn1xiQ

       

http://www.youtube.com/watch?v=uQZ1JI_31xE&list=UUOPwgpx4mNwPULlfdCn1xiQ&index=6

[Anonymous]

 Hello,

I am a hobbyist who is trying to learn more about PSoC. I saw your project and am trying to understand how it works.

I have a psoc 3 board which has chip CY8C3866AXA-040. In this the maximum clock available is 33Mhz. So how can i make sone changes to your project such that i can utilize your schematic for implementation of it on my board?

[ETRO_SSN583]

@kees, I have a project temporarily put aside, that uses counters/timers

   

to add ability to do B burst of  N pulses/burst of F frequency and Duty Cycle

   

with D delay in clocks between bursts. Done in PSOC 1.x as I recall. Will

   

be used in a project once I finish base project. I used that basic approach

   

along with Wavedac to make bursts of Tri, Saw, Sine, Sin(x)/x, Square,

   

Half Wave, Custom waveforms. Swept as well.

       

I suspect new clocking/timing constraints introduced in later versions of Creator

   

will cause my design to lower its max F of operation, we shall see once I get back

   

to it.

       

Your use of SIO great idea, I will add that, although I am more inclined to do a full

   

50 ohm driver with offset/amplitude control. I did in late 70's a design that was based

   

on state variable core generator, using 2 12 bit DACs to control F and Amplitude, encorporated

   

AGC so I could do "flat" sweeps, maxed out at ~ 1 Mhz. Most difficult part was 50 ohm

   

discrete driver that would not distort waveform. Used proprietary NSC SCAMP processor.

   

Was a lot of fun, still have drawings on vellum.

       

Regards, Dana.

[Anonymous]

 Hare, The device should be able to run up to 67 Mhz.  What is telling you that the max frequency is limited to 33 Mhz?